Lines Matching defs:send
73 /* From the Ivybridge PRM, Volume 4 Part 3, page 218 ("send"):
74 * "The send with EOT should use register space R112-R127 for <src>. This is
990 * may send us mixed D and UD types and want us to ignore that and use
2067 /* Example code doesn't set predicate_control for send
2285 * send from any register we want. By using the destination register
2561 * is, send). The hardware behavior is undefined if this instruction is
2566 * utilizing send with SecHalf. More importantly, SIMD8 sampler messages
2695 struct brw_inst *send;
2702 send = next_insn(p, BRW_OPCODE_SEND);
2703 brw_set_src0(p, send, retype(payload, BRW_REGISTER_TYPE_UD));
2704 brw_set_desc(p, send, desc.ud | desc_imm);
2725 send = next_insn(p, BRW_OPCODE_SEND);
2726 brw_set_src0(p, send, retype(payload, BRW_REGISTER_TYPE_UD));
2729 brw_inst_set_send_sel_reg32_desc(devinfo, send, true);
2731 brw_set_src1(p, send, addr);
2734 brw_set_dest(p, send, dst);
2735 brw_inst_set_sfid(devinfo, send, sfid);
2736 brw_inst_set_eot(devinfo, send, eot);
2752 struct brw_inst *send;
2826 send = next_insn(p, devinfo->ver >= 12 ? BRW_OPCODE_SEND : BRW_OPCODE_SENDS);
2827 brw_set_dest(p, send, dst);
2828 brw_set_src0(p, send, retype(payload0, BRW_REGISTER_TYPE_UD));
2829 brw_set_src1(p, send, retype(payload1, BRW_REGISTER_TYPE_UD));
2832 brw_inst_set_send_sel_reg32_desc(devinfo, send, 0);
2833 brw_inst_set_send_desc(devinfo, send, desc.ud);
2838 brw_inst_set_send_sel_reg32_desc(devinfo, send, 1);
2842 brw_inst_set_send_sel_reg32_ex_desc(devinfo, send, 0);
2843 brw_inst_set_sends_ex_desc(devinfo, send, ex_desc.ud);
2848 brw_inst_set_send_sel_reg32_ex_desc(devinfo, send, 1);
2849 brw_inst_set_send_ex_desc_ia_subreg_nr(devinfo, send, ex_desc.subnr >> 2);
2852 brw_inst_set_sfid(devinfo, send, sfid);
2853 brw_inst_set_eot(devinfo, send, eot);
3093 * from this thread, so send the data as a committed write. According to the
3355 /* brw_send_indirect_message will automatically use a direct send message