Lines Matching defs:mode
329 * "For Align16 access mode, only encodings of 0000 and 0011
436 * "For Align16 access mode, only encodings of 0000 and 0011
998 * "Three source instructions can use operands with mixed-mode
1255 * Align1 mode, and neither does the Gfx8 implementation in terms of a
1256 * converting MOV. Gfx7 does zero out the high 16 bits in Align16 mode as
1493 * In single-program-flow (SPF) mode, convert IF and ELSE into ADDs.
1543 * mode when gen < 6, because in single program flow mode on those
1547 * However, on Gfx6, writing to IP doesn't work in single program flow mode
1552 * instructions in single program flow mode on those platforms.
1673 /* In single program flow mode, we can express IF and ELSE instructions
1678 * However, on Gfx6, writing to IP doesn't work in single program flow mode
2567 * are allowed in SIMD16 mode and they could not work without SecHalf. For
3164 * mode on generations that don't have native support for SIMD4x2 atomics,
3341 unsigned mode,
3352 brw_pixel_interp_desc(devinfo, mode, noperspective, coarse_pixel_rate,
3379 /* The flag register is only used on Gfx7 in align1 mode, so avoid setting
3560 /* In SIMD4x2 mode the index can be either zero or one, replicate it
3633 unsigned mode, unsigned mask)
3652 if (mode) {
3654 brw_imm_ud(mode));