Lines Matching defs:devinfo

1083    const struct intel_device_info *devinfo = c->isa->devinfo;
1086 if (devinfo->ver >= 12) {
1097 } else if (devinfo->ver >= 8) {
1110 if (devinfo->ver == 7)
1116 brw_compact_inst_set_control_index(devinfo, dst, i);
1128 const struct intel_device_info *devinfo = c->isa->devinfo;
1131 if (devinfo->ver >= 12) {
1148 } else if (devinfo->ver >= 8) {
1159 brw_compact_inst_set_datatype_index(devinfo, dst, i);
1171 const struct intel_device_info *devinfo = c->isa->devinfo;
1174 if (devinfo->ver >= 12) {
1190 brw_compact_inst_set_subreg_index(devinfo, dst, i);
1202 const struct intel_device_info *devinfo = c->isa->devinfo;
1206 if (devinfo->ver >= 12) {
1220 brw_compact_inst_set_src0_index(devinfo, dst, i);
1232 const struct intel_device_info *devinfo = c->isa->devinfo;
1234 if (devinfo->ver >= 12) {
1236 brw_compact_inst_set_src1_index(devinfo, dst, imm & 0xf);
1239 brw_compact_inst_set_src1_index(devinfo, dst, imm >> 8);
1246 if (devinfo->ver >= 12) {
1260 brw_compact_inst_set_src1_index(devinfo, dst, i);
1270 set_3src_control_index(const struct intel_device_info *devinfo,
1273 assert(devinfo->ver >= 8);
1275 if (devinfo->verx10 >= 125) {
1298 brw_compact_inst_set_3src_control_index(devinfo, dst, i);
1302 } else if (devinfo->ver >= 12) {
1325 brw_compact_inst_set_3src_control_index(devinfo, dst, i);
1334 if (devinfo->ver >= 9 || devinfo->platform == INTEL_PLATFORM_CHV) {
1341 brw_compact_inst_set_3src_control_index(devinfo, dst, i);
1351 set_3src_source_index(const struct intel_device_info *devinfo,
1354 assert(devinfo->ver >= 8);
1356 if (devinfo->ver >= 12) {
1375 devinfo->verx10 >= 125 ?
1378 devinfo->verx10 >= 125 ? ARRAY_SIZE(xehp_3src_source_index_table) :
1383 brw_compact_inst_set_3src_source_index(devinfo, dst, i);
1395 if (devinfo->ver >= 9 || devinfo->platform == INTEL_PLATFORM_CHV) {
1408 brw_compact_inst_set_3src_source_index(devinfo, dst, i);
1418 set_3src_subreg_index(const struct intel_device_info *devinfo,
1421 assert(devinfo->ver >= 12);
1431 brw_compact_inst_set_3src_subreg_index(devinfo, dst, i);
1442 const struct intel_device_info *devinfo = isa->devinfo;
1447 brw_inst_eot(devinfo, src))
1459 if (devinfo->ver >= 12) {
1462 } else if (devinfo->ver >= 8) {
1469 !(devinfo->ver < 7 && brw_inst_bits(src, 90, 90)));
1476 has_3src_unmapped_bits(const struct intel_device_info *devinfo,
1483 if (devinfo->ver >= 12) {
1485 } else if (devinfo->ver >= 9 || devinfo->platform == INTEL_PLATFORM_CHV) {
1489 assert(devinfo->ver >= 8);
1504 brw_try_compact_3src_instruction(const struct intel_device_info *devinfo,
1507 assert(devinfo->ver >= 8);
1509 if (has_3src_unmapped_bits(devinfo, src))
1513 brw_compact_inst_set_3src_##field(devinfo, dst, brw_inst_3src_##field(devinfo, src))
1515 brw_compact_inst_set_3src_##field(devinfo, dst, brw_inst_3src_a16_##field(devinfo, src))
1519 if (!set_3src_control_index(devinfo, dst, src))
1522 if (!set_3src_source_index(devinfo, dst, src))
1525 if (devinfo->ver >= 12) {
1526 if (!set_3src_subreg_index(devinfo, dst, src))
1549 brw_compact_inst_set_3src_cmpt_control(devinfo, dst, true);
1570 compact_immediate(const struct intel_device_info *devinfo,
1573 if (devinfo->ver >= 12) {
1641 uncompact_immediate(const struct intel_device_info *devinfo,
1644 if (devinfo->ver >= 12) {
1682 has_immediate(const struct intel_device_info *devinfo, const brw_inst *inst,
1685 if (brw_inst_src0_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {
1686 *type = brw_inst_src0_type(devinfo, inst);
1688 } else if (brw_inst_src1_reg_file(devinfo, inst) == BRW_IMMEDIATE_VALUE) {
1689 *type = brw_inst_src1_type(devinfo, inst);
1703 const struct intel_device_info *devinfo = isa->devinfo;
1709 if (devinfo->verx10 >= 125) {
1710 if (brw_inst_src0_reg_file(devinfo, &inst) == BRW_GENERAL_REGISTER_FILE &&
1711 brw_inst_src0_vstride(devinfo, &inst) > BRW_VERTICAL_STRIDE_1 &&
1712 brw_inst_src0_vstride(devinfo, &inst) == (brw_inst_src0_width(devinfo, &inst) + 1) &&
1713 brw_inst_src0_hstride(devinfo, &inst) == BRW_HORIZONTAL_STRIDE_1) {
1714 brw_inst_set_src0_vstride(devinfo, &inst, BRW_VERTICAL_STRIDE_1);
1715 brw_inst_set_src0_width(devinfo, &inst, BRW_WIDTH_1);
1716 brw_inst_set_src0_hstride(devinfo, &inst, BRW_HORIZONTAL_STRIDE_0);
1719 if (brw_inst_src1_reg_file(devinfo, &inst) == BRW_GENERAL_REGISTER_FILE &&
1720 brw_inst_src1_vstride(devinfo, &inst) > BRW_VERTICAL_STRIDE_1 &&
1721 brw_inst_src1_vstride(devinfo, &inst) == (brw_inst_src1_width(devinfo, &inst) + 1) &&
1722 brw_inst_src1_hstride(devinfo, &inst) == BRW_HORIZONTAL_STRIDE_1) {
1723 brw_inst_set_src1_vstride(devinfo, &inst, BRW_VERTICAL_STRIDE_1);
1724 brw_inst_set_src1_width(devinfo, &inst, BRW_WIDTH_1);
1725 brw_inst_set_src1_hstride(devinfo, &inst, BRW_HORIZONTAL_STRIDE_0);
1729 if (brw_inst_src0_reg_file(devinfo, &inst) != BRW_IMMEDIATE_VALUE)
1758 if (devinfo->ver >= 6 &&
1759 !(devinfo->platform == INTEL_PLATFORM_HSW &&
1761 !(devinfo->ver >= 8 &&
1762 (brw_inst_src0_type(devinfo, &inst) == BRW_REGISTER_TYPE_DF ||
1763 brw_inst_src0_type(devinfo, &inst) == BRW_REGISTER_TYPE_UQ ||
1764 brw_inst_src0_type(devinfo, &inst) == BRW_REGISTER_TYPE_Q))) {
1765 brw_inst_set_src1_reg_hw_type(devinfo, &inst, 0);
1782 if (devinfo->ver < 12 &&
1783 brw_inst_imm_ud(devinfo, &inst) == 0x0 &&
1784 brw_inst_src0_type(devinfo, &inst) == BRW_REGISTER_TYPE_F &&
1785 brw_inst_dst_type(devinfo, &inst) == BRW_REGISTER_TYPE_F &&
1786 brw_inst_dst_hstride(devinfo, &inst) == BRW_HORIZONTAL_STRIDE_1) {
1787 enum brw_reg_file file = brw_inst_src0_reg_file(devinfo, &inst);
1788 brw_inst_set_src0_file_type(devinfo, &inst, file, BRW_REGISTER_TYPE_VF);
1796 if (devinfo->ver < 12 &&
1797 compact_immediate(devinfo, BRW_REGISTER_TYPE_D,
1798 brw_inst_imm_ud(devinfo, &inst)) != -1 &&
1799 brw_inst_cond_modifier(devinfo, &inst) == BRW_CONDITIONAL_NONE &&
1800 brw_inst_src0_type(devinfo, &inst) == BRW_REGISTER_TYPE_D &&
1801 brw_inst_dst_type(devinfo, &inst) == BRW_REGISTER_TYPE_D) {
1802 enum brw_reg_file src_file = brw_inst_src0_reg_file(devinfo, &inst);
1803 enum brw_reg_file dst_file = brw_inst_dst_reg_file(devinfo, &inst);
1805 brw_inst_set_src0_file_type(devinfo, &inst, src_file, BRW_REGISTER_TYPE_UD);
1806 brw_inst_set_dst_file_type(devinfo, &inst, dst_file, BRW_REGISTER_TYPE_UD);
1822 const struct intel_device_info *devinfo = c->isa->devinfo;
1825 assert(brw_inst_cmpt_control(devinfo, src) == 0);
1828 if (devinfo->ver >= 8) {
1830 if (brw_try_compact_3src_instruction(devinfo, &temp, src)) {
1842 bool is_immediate = has_immediate(devinfo, src, &type);
1848 if (devinfo->ver < 6)
1851 compacted_imm = compact_immediate(devinfo, type,
1852 brw_inst_imm_ud(devinfo, src));
1863 brw_compact_inst_set_##field(devinfo, &temp, brw_inst_##field(devinfo, src))
1865 brw_compact_inst_set_##field##_reg_nr(devinfo, &temp, \
1866 brw_inst_##field##_da_reg_nr(devinfo, src))
1882 if (devinfo->ver >= 12) {
1889 brw_compact_inst_set_src1_reg_nr(devinfo, &temp, compacted_imm >> 4);
1894 if (devinfo->ver >= 6) {
1900 if (devinfo->ver <= 6)
1910 brw_compact_inst_set_src1_reg_nr(devinfo, &temp, compacted_imm & 0xff);
1915 brw_compact_inst_set_cmpt_control(devinfo, &temp, true);
1938 const struct intel_device_info *devinfo = c->isa->devinfo;
1940 c->control_index_table[brw_compact_inst_control_index(devinfo, src)];
1942 if (devinfo->ver >= 12) {
1953 } else if (devinfo->ver >= 8) {
1963 if (devinfo->ver == 7)
1972 const struct intel_device_info *devinfo = c->isa->devinfo;
1974 c->datatype_table[brw_compact_inst_datatype_index(devinfo, src)];
1976 if (devinfo->ver >= 12) {
1987 } else if (devinfo->ver >= 8) {
2001 const struct intel_device_info *devinfo = c->isa->devinfo;
2003 c->subreg_table[brw_compact_inst_subreg_index(devinfo, src)];
2005 if (devinfo->ver >= 12) {
2020 const struct intel_device_info *devinfo = c->isa->devinfo;
2021 uint32_t compacted = brw_compact_inst_src0_index(devinfo, src);
2024 if (devinfo->ver >= 12) {
2039 const struct intel_device_info *devinfo = c->isa->devinfo;
2041 c->src1_index_table[brw_compact_inst_src1_index(devinfo, src)];
2043 if (devinfo->ver >= 12) {
2058 const struct intel_device_info *devinfo = c->isa->devinfo;
2059 assert(devinfo->ver >= 8);
2061 if (devinfo->verx10 >= 125) {
2062 uint64_t compacted = brw_compact_inst_3src_control_index(devinfo, src);
2084 } else if (devinfo->ver >= 12) {
2085 uint64_t compacted = brw_compact_inst_3src_control_index(devinfo, src);
2107 uint32_t compacted = brw_compact_inst_3src_control_index(devinfo, src);
2113 if (devinfo->ver >= 9 || devinfo->platform == INTEL_PLATFORM_CHV)
2119 set_uncompacted_3src_source_index(const struct intel_device_info *devinfo,
2122 assert(devinfo->ver >= 8);
2124 uint32_t compacted = brw_compact_inst_3src_source_index(devinfo, src);
2126 if (devinfo->ver >= 12) {
2128 devinfo->verx10 >= 125 ?
2156 if (devinfo->ver >= 9 || devinfo->platform == INTEL_PLATFORM_CHV) {
2168 set_uncompacted_3src_subreg_index(const struct intel_device_info *devinfo,
2171 assert(devinfo->ver >= 12);
2173 uint32_t compacted = brw_compact_inst_3src_subreg_index(devinfo, src);
2186 const struct intel_device_info *devinfo = c->isa->devinfo;
2187 assert(devinfo->ver >= 8);
2190 brw_inst_set_3src_##field(devinfo, dst, brw_compact_inst_3src_##field(devinfo, src))
2192 brw_inst_set_3src_a16_##field(devinfo, dst, brw_compact_inst_3src_##field(devinfo, src))
2196 if (devinfo->ver >= 12) {
2198 set_uncompacted_3src_source_index(devinfo, dst, src);
2199 set_uncompacted_3src_subreg_index(devinfo, dst, src);
2209 set_uncompacted_3src_source_index(devinfo, dst, src);
2224 brw_inst_set_3src_cmpt_control(devinfo, dst, false);
2234 const struct intel_device_info *devinfo = c->isa->devinfo;
2237 if (devinfo->ver >= 8 &&
2239 brw_compact_inst_3src_hw_opcode(devinfo, src)))) {
2245 brw_inst_set_##field(devinfo, dst, brw_compact_inst_##field(devinfo, src))
2247 brw_inst_set_##field##_da_reg_nr(devinfo, dst, \
2248 brw_compact_inst_##field##_reg_nr(devinfo, src))
2259 if (has_immediate(devinfo, dst, &type)) {
2260 unsigned imm = uncompact_immediate(devinfo, type,
2261 brw_compact_inst_imm(devinfo, src));
2262 brw_inst_set_imm_ud(devinfo, dst, imm);
2268 if (devinfo->ver >= 12) {
2273 if (devinfo->ver >= 6) {
2281 if (devinfo->ver <= 6)
2287 brw_inst_set_cmpt_control(devinfo, dst, false);
2308 isa->devinfo->ver);
2343 const struct intel_device_info *devinfo = isa->devinfo;
2349 int shift = devinfo->ver >= 8 ? 3 : 0;
2351 int32_t jip_compacted = brw_inst_jip(devinfo, insn) >> shift;
2355 brw_inst_set_jip(devinfo, insn, jip_compacted << shift);
2359 (brw_inst_opcode(isa, insn) == BRW_OPCODE_ELSE && devinfo->ver <= 7))
2362 int32_t uip_compacted = brw_inst_uip(devinfo, insn) >> shift;
2366 brw_inst_set_uip(devinfo, insn, uip_compacted << shift);
2370 update_gfx4_jump_count(const struct intel_device_info *devinfo, brw_inst *insn,
2373 assert(devinfo->ver == 5 || devinfo->platform == INTEL_PLATFORM_G4X);
2379 int shift = devinfo->platform == INTEL_PLATFORM_G4X ? 1 : 0;
2381 int jump_count_compacted = brw_inst_gfx4_jump_count(devinfo, insn) << shift;
2389 brw_inst_set_gfx4_jump_count(devinfo, insn, jump_count_compacted >> shift);
2396 const struct intel_device_info *devinfo = isa->devinfo;
2424 switch (devinfo->ver) {
2429 if (devinfo->verx10 >= 125) {
2486 const struct intel_device_info *devinfo = p->devinfo;
2487 if (devinfo->ver == 4 && devinfo->platform != INTEL_PLATFORM_G4X)
2538 devinfo->platform == INTEL_PLATFORM_G4X) {
2542 devinfo, align, brw_opcode_encode(p->isa, BRW_OPCODE_NENOP));
2543 brw_compact_inst_set_cmpt_control(devinfo, align, true);
2571 offset = next_offset(devinfo, store, offset)) {
2580 if (devinfo->ver >= 6) {
2583 update_gfx4_jump_count(devinfo, insn, this_old_ip,
2593 if (devinfo->ver >= 7) {
2594 if (brw_inst_cmpt_control(devinfo, insn)) {
2608 } else if (devinfo->ver == 6) {
2609 assert(!brw_inst_cmpt_control(devinfo, insn));
2612 int jump_count_compacted = brw_inst_gfx6_jump_count(devinfo, insn);
2617 brw_inst_set_gfx6_jump_count(devinfo, insn, jump_count_compacted);
2619 update_gfx4_jump_count(devinfo, insn, this_old_ip,
2629 if (brw_inst_cmpt_control(devinfo, insn))
2632 if (brw_inst_dst_reg_file(devinfo, insn) == BRW_ARCHITECTURE_REGISTER_FILE &&
2633 brw_inst_dst_da_reg_nr(devinfo, insn) == BRW_ARF_IP) {
2634 assert(brw_inst_src1_reg_file(devinfo, insn) == BRW_IMMEDIATE_VALUE);
2637 int jump_compacted = brw_inst_imm_d(devinfo, insn) >> shift;
2642 brw_inst_set_imm_ud(devinfo, insn, jump_compacted << shift);
2660 devinfo, align, brw_opcode_encode(p->isa, BRW_OPCODE_NOP));
2661 brw_compact_inst_set_cmpt_control(devinfo, align, true);
2684 offset = next_offset(devinfo, store, offset);
2689 offset = next_offset(devinfo, store, offset);