Lines Matching refs:compute_pipeline
1067 struct pvr_compute_pipeline *const compute_pipeline)
1082 &compute_pipeline->state.shader,
1125 compute_pipeline->base.layout,
1127 &compute_pipeline->state.descriptor);
1138 compute_pipeline->state.shader.bo->vma->dev_addr,
1139 &compute_pipeline->state.primary_program,
1140 &compute_pipeline->state.primary_program_info);
1147 compute_pipeline->state.flags.base_workgroup =
1152 if (compute_pipeline->state.flags.base_workgroup) {
1160 compute_pipeline->state.shader.bo->vma->dev_addr,
1161 &compute_pipeline->state.primary_base_workgroup_variant_program);
1172 &compute_pipeline->state.primary_program,
1173 &compute_pipeline->state.primary_program_info);
1176 pvr_bo_free(device, compute_pipeline->state.descriptor.pds_code.pvr_bo);
1179 pvr_bo_free(device, compute_pipeline->state.shader.bo);
1189 struct pvr_compute_pipeline *compute_pipeline)
1195 &compute_pipeline->base);
1197 compute_pipeline->base.layout =
1204 compute_pipeline);
1206 pvr_pipeline_finish(&compute_pipeline->base);
1220 struct pvr_compute_pipeline *compute_pipeline;
1223 compute_pipeline = vk_zalloc2(&device->vk.alloc,
1225 sizeof(*compute_pipeline),
1228 if (!compute_pipeline)
1236 compute_pipeline);
1238 vk_free2(&device->vk.alloc, allocator, compute_pipeline);
1242 *pipeline_out = pvr_pipeline_to_handle(&compute_pipeline->base);
1250 struct pvr_compute_pipeline *const compute_pipeline)
1252 if (compute_pipeline->state.flags.base_workgroup) {
1256 &compute_pipeline->state.primary_base_workgroup_variant_program);
1262 &compute_pipeline->state.primary_program,
1263 &compute_pipeline->state.primary_program_info);
1266 &compute_pipeline->state.descriptor);
1267 pvr_bo_free(device, compute_pipeline->state.shader.bo);
1269 pvr_pipeline_finish(&compute_pipeline->base);
1271 vk_free2(&device->vk.alloc, allocator, compute_pipeline);
2032 struct pvr_compute_pipeline *const compute_pipeline =
2035 pvr_compute_pipeline_destroy(device, pAllocator, compute_pipeline);