Lines Matching refs:dsa
33 struct pipe_depth_stencil_alpha_state dsa;
35 memset(&dsa, 0, sizeof(dsa)); /* memcmp safety */
38 dsa.depth_enabled = 1;
39 dsa.depth_func = d3dcmpfunc_to_pipe_func(rs[D3DRS_ZFUNC]);
41 dsa.depth_writemask = !!rs[D3DRS_ZWRITEENABLE] &&
42 dsa.depth_func != PIPE_FUNC_EQUAL &&
43 dsa.depth_func != PIPE_FUNC_NEVER;
47 dsa.stencil[0].enabled = 1;
48 dsa.stencil[0].func = d3dcmpfunc_to_pipe_func(rs[D3DRS_STENCILFUNC]);
49 dsa.stencil[0].fail_op = d3dstencilop_to_pipe_stencil_op(rs[D3DRS_STENCILFAIL]);
50 dsa.stencil[0].zpass_op = d3dstencilop_to_pipe_stencil_op(rs[D3DRS_STENCILPASS]);
51 dsa.stencil[0].zfail_op = d3dstencilop_to_pipe_stencil_op(rs[D3DRS_STENCILZFAIL]);
52 dsa.stencil[0].valuemask = rs[D3DRS_STENCILMASK];
53 dsa.stencil[0].writemask = rs[D3DRS_STENCILWRITEMASK];
56 dsa.stencil[1].enabled = 1;
57 dsa.stencil[1].func = d3dcmpfunc_to_pipe_func(rs[D3DRS_CCW_STENCILFUNC]);
58 dsa.stencil[1].fail_op = d3dstencilop_to_pipe_stencil_op(rs[D3DRS_CCW_STENCILFAIL]);
59 dsa.stencil[1].zpass_op = d3dstencilop_to_pipe_stencil_op(rs[D3DRS_CCW_STENCILPASS]);
60 dsa.stencil[1].zfail_op = d3dstencilop_to_pipe_stencil_op(rs[D3DRS_CCW_STENCILZFAIL]);
61 dsa.stencil[1].valuemask = dsa.stencil[0].valuemask;
62 dsa.stencil[1].writemask = dsa.stencil[0].writemask;
67 dsa.alpha_enabled = 1;
68 dsa.alpha_func = d3dcmpfunc_to_pipe_func(rs[D3DRS_ALPHAFUNC]);
69 dsa.alpha_ref_value = (float)rs[D3DRS_ALPHAREF] / 255.0f;
72 *dsa_state = dsa;