Lines Matching defs:layout
555 if ((pipeline->layout->push_constant_stages & VK_SHADER_STAGE_COMPUTE_BIT) > 0)
556 state->has_pcbuf[PIPE_SHADER_COMPUTE] = pipeline->layout->push_constant_size > 0;
557 state->uniform_blocks[PIPE_SHADER_COMPUTE].count = pipeline->layout->stage[MESA_SHADER_COMPUTE].uniform_block_count;
558 for (unsigned j = 0; j < pipeline->layout->stage[MESA_SHADER_COMPUTE].uniform_block_count; j++)
559 state->uniform_blocks[PIPE_SHADER_COMPUTE].size[j] = pipeline->layout->stage[MESA_SHADER_COMPUTE].uniform_block_sizes[j];
560 if (!state->has_pcbuf[PIPE_SHADER_COMPUTE] && !pipeline->layout->stage[MESA_SHADER_COMPUTE].uniform_block_count)
631 state->uniform_blocks[sh].count = pipeline->layout->stage[i].uniform_block_count;
632 for (unsigned j = 0; j < pipeline->layout->stage[i].uniform_block_count; j++)
633 state->uniform_blocks[sh].size[j] = pipeline->layout->stage[i].uniform_block_sizes[j];
635 u_foreach_bit(stage, pipeline->layout->push_constant_stages) {
637 state->has_pcbuf[sh] = pipeline->layout->push_constant_size > 0;
1007 state->push_size[pipeline->is_compute_pipeline] = pipeline->layout->push_constant_size;
1405 for (j = 0; j < set->layout->binding_count; j++) {
1408 binding = &set->layout->binding[j];
1424 const struct lvp_descriptor_set_layout *layout =
1428 dyn_info->stage[stage].const_buffer_count += layout->stage[stage].const_buffer_count;
1429 dyn_info->stage[stage].shader_buffer_count += layout->stage[stage].shader_buffer_count;
1430 dyn_info->stage[stage].sampler_count += layout->stage[stage].sampler_count;
1431 dyn_info->stage[stage].sampler_view_count += layout->stage[stage].sampler_view_count;
1432 dyn_info->stage[stage].image_count += layout->stage[stage].image_count;
1433 dyn_info->stage[stage].uniform_block_count += layout->stage[stage].uniform_block_count;
1436 dyn_info->dyn_index += layout->dynamic_offset_count;
1444 LVP_FROM_HANDLE(lvp_pipeline_layout, layout, bds->layout);
1448 increment_dyn_info(dyn_info, layout->vk.set_layouts[i], false);
1453 if (set->layout->shader_stages & VK_SHADER_STAGE_COMPUTE_BIT)
1455 increment_dyn_info(dyn_info, layout->vk.set_layouts[bds->first_set + i], true);
1463 LVP_FROM_HANDLE(lvp_pipeline_layout, layout, bds->layout);
1478 increment_dyn_info(&dyn_info, layout->vk.set_layouts[i], false);
1482 if (!layout->vk.set_layouts[bds->first_set + i])
1489 assert(set->layout->dynamic_offset_count <= dyn_info.dynamic_offset_count);
1493 set->layout->dynamic_offset_count <= dyn_info.dynamic_offset_count - dyn_info.dyn_index);
1495 if (set->layout->shader_stages & VK_SHADER_STAGE_VERTEX_BIT)
1498 if (set->layout->shader_stages & VK_SHADER_STAGE_GEOMETRY_BIT)
1501 if (set->layout->shader_stages & VK_SHADER_STAGE_TESSELLATION_CONTROL_BIT)
1504 if (set->layout->shader_stages & VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT)
1507 if (set->layout->shader_stages & VK_SHADER_STAGE_FRAGMENT_BIT)
1510 increment_dyn_info(&dyn_info, layout->vk.set_layouts[bds->first_set + i], true);
3266 const struct lvp_descriptor_set_layout *layout =
3267 vk_to_lvp_descriptor_set_layout(pds->layout->vk.set_layouts[pds->set]);
3269 if (!(layout->shader_stages & VK_SHADER_STAGE_COMPUTE_BIT))
3272 increment_dyn_info(dyn_info, pds->layout->vk.set_layouts[i], false);
3278 &layout->binding[desc->dst_binding];
3297 LVP_FROM_HANDLE(lvp_pipeline_layout, layout, in_cmd->layout);
3317 out_cmd->layout = layout;
3376 const struct lvp_descriptor_set_layout *layout =
3377 vk_to_lvp_descriptor_set_layout(pds->layout->vk.set_layouts[pds->set]);
3387 increment_dyn_info(&dyn_info, pds->layout->vk.set_layouts[i], false);
3394 &layout->binding[desc->dst_binding];
3402 if (layout->shader_stages & VK_SHADER_STAGE_VERTEX_BIT)
3407 if (layout->shader_stages & VK_SHADER_STAGE_FRAGMENT_BIT)
3412 if (layout->shader_stages & VK_SHADER_STAGE_GEOMETRY_BIT)
3417 if (layout->shader_stages & VK_SHADER_STAGE_TESSELLATION_CONTROL_BIT)
3422 if (layout->shader_stages & VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT)
3477 pds->layout = lvp_pipeline_layout_to_handle(templ->pipeline_layout);