Lines Matching refs:dst
489 const struct Shader_dst_operand *dst)
492 assert(dst->base.index_dim == 1);
493 assert(dst->base.index[0].imm < SHADER_MAX_INPUTS);
495 reg = ureg_DECL_vs_input(ureg, dst->base.index[0].imm);
497 dcl_base_input(sx, ureg, dst, reg, dst->base.index[0].imm,
504 const struct Shader_dst_operand *dst)
506 if (dst->base.index_dim == 2) {
507 assert(dst->base.index[1].imm < SHADER_MAX_INPUTS);
509 declare_vertices_in(sx, dst->base.index[0].imm);
513 if (!sx->inputs[dst->base.index[1].imm].reg.File) {
517 dst->base.index[1].imm,
519 dcl_base_input(sx, ureg, dst, reg, dst->base.index[1].imm,
523 assert(dst->base.type == D3D10_SB_OPERAND_TYPE_INPUT_PRIMITIVEID);
524 assert(dst->base.index_dim == 0);
533 const struct Shader_dst_operand *dst,
537 assert(dst->base.index_dim == 1);
538 assert(dst->base.index[0].imm < SHADER_MAX_INPUTS);
542 dcl_base_input(sx, ureg, dst, reg, dst->base.index[0].imm,
549 const struct Shader_dst_operand *dst,
553 assert(dst->base.index_dim == 2);
554 assert(dst->base.index[1].imm < SHADER_MAX_INPUTS);
556 declare_vertices_in(sx, dst->base.index[0].imm);
562 dcl_base_input(sx, ureg, dst, reg, dst->base.index[1].imm,
569 const struct Shader_dst_operand *dst,
573 assert(dst->base.index_dim == 1);
574 assert(dst->base.index[0].imm < SHADER_MAX_INPUTS);
578 dst->base.index[0].imm,
581 dcl_base_input(sx, ureg, dst, reg, dst->base.index[0].imm,
588 const struct Shader_dst_operand *dst,
592 assert(dst->base.index_dim == 1);
593 assert(dst->base.index[0].imm < SHADER_MAX_INPUTS);
622 dcl_base_input(sx, ureg, dst, reg, dst->base.index[0].imm,
629 const struct Shader_dst_operand *dst,
633 assert(dst->base.index_dim == 1);
634 assert(dst->base.index[0].imm < SHADER_MAX_INPUTS);
652 dcl_base_input(sx, ureg, dst, reg, dst->base.index[0].imm,
1169 struct ureg_dst dst,
1196 &dst, 1,
1203 typedef void (*unary_ureg_func)(struct ureg_program *ureg, struct ureg_dst dst,
1210 struct ureg_dst dst = translate_dst_operand(sx, &opcode->dst[0],
1217 scalar_dst = ureg_writemask(dst, TGSI_WRITEMASK_X);
1222 scalar_dst = ureg_writemask(dst, TGSI_WRITEMASK_Y);
1227 scalar_dst = ureg_writemask(dst, TGSI_WRITEMASK_Z);
1232 scalar_dst = ureg_writemask(dst, TGSI_WRITEMASK_W);
1311 if (opcode.dst[0].base.type != D3D10_SB_OPERAND_TYPE_NULL) {
1313 translate_dst_operand(&sx, &opcode.dst[0], opcode.saturate),
1318 if (opcode.dst[1].base.type != D3D10_SB_OPERAND_TYPE_NULL) {
1320 translate_dst_operand(&sx, &opcode.dst[1], opcode.saturate),
1349 translate_dst_operand(&sx, &opcode.dst[0], opcode.saturate),
1380 translate_dst_operand(&sx, &opcode.dst[0], opcode.saturate),
1405 translate_dst_operand(&sx, &opcode.dst[0], opcode.saturate),
1416 translate_dst_operand(&sx, &opcode.dst[0],
1446 translate_dst_operand(&sx, &opcode.dst[0],
1455 struct ureg_dst dstreg = translate_dst_operand(&sx, &opcode.dst[0],
1523 translate_dst_operand(&sx, &opcode.dst[0],
1536 translate_dst_operand(&sx, &opcode.dst[0],
1570 translate_dst_operand(&sx, &opcode.dst[0],
1586 translate_dst_operand(&sx, &opcode.dst[0],
1621 translate_dst_operand(&sx, &opcode.dst[0],
1637 translate_dst_operand(&sx, &opcode.dst[0],
1660 translate_dst_operand(&sx, &opcode.dst[0],
1676 translate_dst_operand(&sx, &opcode.dst[0],
1688 translate_dst_operand(&sx, &opcode.dst[0],
1705 translate_dst_operand(&sx, &opcode.dst[0],
1728 translate_dst_operand(&sx, &opcode.dst[0],
1744 translate_dst_operand(&sx, &opcode.dst[0],
1753 if (opcode.dst[0].base.type != D3D10_SB_OPERAND_TYPE_NULL) {
1754 struct ureg_dst dst = translate_dst_operand(&sx, &opcode.dst[0],
1757 ureg_SIN(ureg, ureg_writemask(dst, TGSI_WRITEMASK_X),
1759 ureg_SIN(ureg, ureg_writemask(dst, TGSI_WRITEMASK_Y),
1761 ureg_SIN(ureg, ureg_writemask(dst, TGSI_WRITEMASK_Z),
1763 ureg_SIN(ureg, ureg_writemask(dst, TGSI_WRITEMASK_W),
1766 if (opcode.dst[1].base.type != D3D10_SB_OPERAND_TYPE_NULL) {
1767 struct ureg_dst dst = translate_dst_operand(&sx, &opcode.dst[1],
1770 ureg_COS(ureg, ureg_writemask(dst, TGSI_WRITEMASK_X),
1772 ureg_COS(ureg, ureg_writemask(dst, TGSI_WRITEMASK_Y),
1774 ureg_COS(ureg, ureg_writemask(dst, TGSI_WRITEMASK_Z),
1776 ureg_COS(ureg, ureg_writemask(dst, TGSI_WRITEMASK_W),
1788 if (opcode.dst[0].base.type != D3D10_SB_OPERAND_TYPE_NULL) {
1790 translate_dst_operand(&sx, &opcode.dst[0],
1794 if (opcode.dst[1].base.type != D3D10_SB_OPERAND_TYPE_NULL) {
1796 translate_dst_operand(&sx, &opcode.dst[1],
1805 if (opcode.dst[0].base.type != D3D10_SB_OPERAND_TYPE_NULL) {
1807 translate_dst_operand(&sx, &opcode.dst[0],
1812 if (opcode.dst[1].base.type != D3D10_SB_OPERAND_TYPE_NULL) {
1814 translate_dst_operand(&sx, &opcode.dst[1],
1825 unsigned res_index = opcode.dst[0].base.index[0].imm;
1826 assert(opcode.dst[0].base.index_dim == 1);
1861 assert(opcode.dst[0].base.index_dim == 1);
1862 assert(opcode.dst[0].base.index[0].imm < SHADER_MAX_SAMPLERS);
1864 sx.samplers[opcode.dst[0].base.index[0].imm] =
1866 opcode.dst[0].base.index[0].imm);
1952 dcl_vs_input(&sx, ureg, &opcode.dst[0]);
1955 dcl_gs_input(&sx, ureg, &opcode.dst[0]);
1961 dcl_sgv_input(&sx, ureg, &opcode.dst[0], opcode.dcl_siv_name);
1966 dcl_siv_input(&sx, ureg, &opcode.dst[0], opcode.dcl_siv_name);
1971 dcl_ps_input(&sx, ureg, &opcode.dst[0],
1977 dcl_ps_sgv_input(&sx, ureg, &opcode.dst[0],
1983 dcl_ps_siv_input(&sx, ureg, &opcode.dst[0],
1991 if (opcode.dst[0].base.type == D3D10_SB_OPERAND_TYPE_OUTPUT_DEPTH) {
1993 assert(opcode.dst[0].base.index_dim == 0);
1999 assert(opcode.dst[0].base.index_dim == 1);
2000 assert(opcode.dst[0].base.index[0].imm < SHADER_MAX_OUTPUTS);
2005 opcode.dst[0].base.index[0].imm),
2006 &opcode.dst[0]);
2009 assert(opcode.dst[0].base.index_dim == 1);
2010 assert(opcode.dst[0].base.index[0].imm < SHADER_MAX_OUTPUTS);
2015 = opcode.dst[0].base.index[0].imm;
2020 opcode.dst[0].base.index[0].imm),
2021 &opcode.dst[0]);
2026 assert(opcode.dst[0].base.index_dim == 1);
2027 assert(opcode.dst[0].base.index[0].imm < SHADER_MAX_OUTPUTS);
2032 = opcode.dst[0].base.index[0].imm;
2046 opcode.dst[0].base.index[0].imm;
2060 opcode.dst[0].base.index[0].imm;
2073 &opcode.dst[0]),
2074 opcode.dst[0].mask >> D3D10_SB_OPERAND_4_COMPONENT_MASK_SHIFT,
2076 &opcode.dst[0]);
2080 assert(opcode.dst[0].base.index_dim == 1);
2081 assert(opcode.dst[0].base.index[0].imm < SHADER_MAX_OUTPUTS);
2086 = opcode.dst[0].base.index[0].imm;
2092 &opcode.dst[0]);
2228 struct ureg_dst dst[SHADER_MAX_DST_OPERANDS];
2245 dst[i] = translate_dst_operand(&sx, &opcode.dst[i],
2255 if (opcode.dst[0].base.type == D3D10_SB_OPERAND_TYPE_OUTPUT_DEPTH) {
2257 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_Z);
2263 dst,