Lines Matching defs:elem
61 const struct pipe_vertex_element *elem = elements + i;
63 int binding = elem->vertex_buffer_index;
71 ves->bindings[binding].inputRate = elem->instance_divisor ? VK_VERTEX_INPUT_RATE_INSTANCE : VK_VERTEX_INPUT_RATE_VERTEX;
73 assert(!elem->instance_divisor || zink_screen(pctx->screen)->info.have_EXT_vertex_attribute_divisor);
74 if (elem->instance_divisor > screen->info.vdiv_props.maxVertexAttribDivisor)
75 debug_printf("zink: clamping instance divisor %u to %u\n", elem->instance_divisor, screen->info.vdiv_props.maxVertexAttribDivisor);
76 ves->divisor[binding] = MIN2(elem->instance_divisor, screen->info.vdiv_props.maxVertexAttribDivisor);
79 if (screen->format_props[elem->src_format].bufferFeatures & VK_FORMAT_FEATURE_VERTEX_BUFFER_BIT)
80 format = zink_get_format(screen, elem->src_format);
82 enum pipe_format new_format = zink_decompose_vertex_format(elem->src_format);
100 if (util_format_get_nr_components(elem->src_format) == 4) {
115 ves->hw_state.dynattribs[i].offset = elem->src_offset;
121 ves->hw_state.attribs[i].offset = elem->src_offset;
122 ves->min_stride[binding] = MAX2(ves->min_stride[binding], elem->src_offset + vk_format_get_blocksize(format));
127 const struct pipe_vertex_element *elem = elements + i;
128 const struct util_format_description *desc = util_format_description(elem->src_format);
748 u_foreach_bit(elem, vstate->input.full_velem_mask & partial_velem_mask) {
749 unsigned idx = util_bitcount(vstate->input.full_velem_mask & BITFIELD_MASK(elem));