Lines Matching defs:slot
542 update_descriptor_state_ubo(struct zink_context *ctx, enum pipe_shader_type shader, unsigned slot, struct zink_resource *res)
547 ctx->di.descriptor_res[type][shader][slot] = res;
548 ctx->di.ubos[shader][slot].offset = ctx->ubos[shader][slot].buffer_offset;
550 ctx->di.ubos[shader][slot].buffer = res->obj->buffer;
551 ctx->di.ubos[shader][slot].range = ctx->ubos[shader][slot].buffer_size;
552 assert(ctx->di.ubos[shader][slot].range <= screen->info.props.limits.maxUniformBufferRange);
555 ctx->di.ubos[shader][slot].buffer = have_null_descriptors ? VK_NULL_HANDLE : null_buffer;
556 ctx->di.ubos[shader][slot].range = VK_WHOLE_SIZE;
558 if (!slot) {
568 update_descriptor_state_ssbo(struct zink_context *ctx, enum pipe_shader_type shader, unsigned slot, struct zink_resource *res)
573 ctx->di.descriptor_res[type][shader][slot] = res;
574 ctx->di.ssbos[shader][slot].offset = ctx->ssbos[shader][slot].buffer_offset;
576 ctx->di.ssbos[shader][slot].buffer = res->obj->buffer;
577 ctx->di.ssbos[shader][slot].range = ctx->ssbos[shader][slot].buffer_size;
580 ctx->di.ssbos[shader][slot].buffer = have_null_descriptors ? VK_NULL_HANDLE : null_buffer;
581 ctx->di.ssbos[shader][slot].range = VK_WHOLE_SIZE;
587 update_descriptor_state_sampler(struct zink_context *ctx, enum pipe_shader_type shader, unsigned slot, struct zink_resource *res)
592 ctx->di.descriptor_res[type][shader][slot] = res;
595 struct zink_buffer_view *bv = get_bufferview_for_binding(ctx, shader, type, slot);
596 ctx->di.tbos[shader][slot] = bv->buffer_view;
597 ctx->di.sampler_surfaces[shader][slot].bufferview = bv;
598 ctx->di.sampler_surfaces[shader][slot].is_buffer = true;
600 struct zink_surface *surface = get_imageview_for_binding(ctx, shader, type, slot);
601 ctx->di.textures[shader][slot].imageLayout = get_layout_for_binding(ctx, res, type, shader == PIPE_SHADER_COMPUTE);
602 ctx->di.textures[shader][slot].imageView = surface->image_view;
604 ctx->sampler_states[shader][slot] && ctx->sampler_states[shader][slot]->sampler_clamped) {
605 struct zink_sampler_state *state = ctx->sampler_states[shader][slot];
610 if (ctx->di.textures[shader][slot].sampler != sampler) {
611 screen->context_invalidate_descriptor_state(ctx, shader, ZINK_DESCRIPTOR_TYPE_SAMPLER_VIEW, slot, 1);
612 ctx->di.textures[shader][slot].sampler = sampler;
615 ctx->di.sampler_surfaces[shader][slot].surface = surface;
616 ctx->di.sampler_surfaces[shader][slot].is_buffer = false;
620 ctx->di.textures[shader][slot].imageView = VK_NULL_HANDLE;
621 ctx->di.textures[shader][slot].imageLayout = VK_IMAGE_LAYOUT_UNDEFINED;
622 ctx->di.tbos[shader][slot] = VK_NULL_HANDLE;
626 ctx->di.textures[shader][slot].imageView = null_surface->image_view;
627 ctx->di.textures[shader][slot].imageLayout = VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL;
628 ctx->di.tbos[shader][slot] = null_bufferview->buffer_view;
630 memset(&ctx->di.sampler_surfaces[shader][slot], 0, sizeof(ctx->di.sampler_surfaces[shader][slot]));
636 update_descriptor_state_image(struct zink_context *ctx, enum pipe_shader_type shader, unsigned slot, struct zink_resource *res)
641 ctx->di.descriptor_res[type][shader][slot] = res;
644 struct zink_buffer_view *bv = get_bufferview_for_binding(ctx, shader, type, slot);
645 ctx->di.texel_images[shader][slot] = bv->buffer_view;
646 ctx->di.image_surfaces[shader][slot].bufferview = bv;
647 ctx->di.image_surfaces[shader][slot].is_buffer = true;
649 struct zink_surface *surface = get_imageview_for_binding(ctx, shader, type, slot);
650 ctx->di.images[shader][slot].imageLayout = VK_IMAGE_LAYOUT_GENERAL;
651 ctx->di.images[shader][slot].imageView = surface->image_view;
652 ctx->di.image_surfaces[shader][slot].surface = surface;
653 ctx->di.image_surfaces[shader][slot].is_buffer = false;
657 memset(&ctx->di.images[shader][slot], 0, sizeof(ctx->di.images[shader][slot]));
658 ctx->di.texel_images[shader][slot] = VK_NULL_HANDLE;
662 ctx->di.images[shader][slot].imageView = null_surface->image_view;
663 ctx->di.images[shader][slot].imageLayout = VK_IMAGE_LAYOUT_GENERAL;
664 ctx->di.texel_images[shader][slot] = null_bufferview->buffer_view;
666 memset(&ctx->di.image_surfaces[shader][slot], 0, sizeof(ctx->di.image_surfaces[shader][slot]));
1103 update_existing_vbo(struct zink_context *ctx, unsigned slot)
1105 if (!ctx->vertex_buffers[slot].buffer.resource)
1107 struct zink_resource *res = zink_resource(ctx->vertex_buffers[slot].buffer.resource);
1109 res->vbo_bind_mask &= ~BITFIELD_BIT(slot);
1252 unbind_ubo(struct zink_context *ctx, struct zink_resource *res, enum pipe_shader_type pstage, unsigned slot)
1256 res->ubo_bind_mask[pstage] &= ~BITFIELD_BIT(slot);
1371 unbind_ssbo(struct zink_context *ctx, struct zink_resource *res, enum pipe_shader_type pstage, unsigned slot, bool writable)
1375 res->ssbo_bind_mask[pstage] &= ~BITFIELD_BIT(slot);
1458 u_foreach_bit(slot, res->sampler_binds[PIPE_SHADER_COMPUTE]) {
1459 if (ctx->di.textures[PIPE_SHADER_COMPUTE][slot].imageLayout != layout) {
1460 update_descriptor_state_sampler(ctx, PIPE_SHADER_COMPUTE, slot, res);
1461 zink_screen(ctx->base.screen)->context_invalidate_descriptor_state(ctx, PIPE_SHADER_COMPUTE, ZINK_DESCRIPTOR_TYPE_SAMPLER_VIEW, slot, 1);
1466 u_foreach_bit(slot, res->sampler_binds[i]) {
1467 if (ctx->di.textures[i][slot].imageLayout != layout) {
1468 update_descriptor_state_sampler(ctx, i, slot, res);
1469 zink_screen(ctx->base.screen)->context_invalidate_descriptor_state(ctx, i, ZINK_DESCRIPTOR_TYPE_SAMPLER_VIEW, slot, 1);
1507 unbind_shader_image(struct zink_context *ctx, enum pipe_shader_type stage, unsigned slot)
1509 struct zink_image_view *image_view = &ctx->image_views[stage][slot];
1515 res->image_binds[stage] &= ~BITFIELD_BIT(slot);
1696 unbind_samplerview(struct zink_context *ctx, enum pipe_shader_type stage, unsigned slot)
1698 struct zink_sampler_view *sv = zink_sampler_view(ctx->sampler_views[stage][slot]);
1705 res->sampler_binds[stage] &= ~BITFIELD_BIT(slot);
2419 u_foreach_bit(slot, res->sampler_binds[i]) {
2421 if (ctx->di.descriptor_res[ZINK_DESCRIPTOR_TYPE_SAMPLER_VIEW][i][slot] == res)
2422 ctx->di.textures[i][slot].imageLayout = zink_descriptor_util_image_layout_eval(ctx, res, false);
3810 rebind_ubo(struct zink_context *ctx, enum pipe_shader_type shader, unsigned slot)
3812 struct zink_resource *res = update_descriptor_state_ubo(ctx, shader, slot,
3813 ctx->di.descriptor_res[ZINK_DESCRIPTOR_TYPE_UBO][shader][slot]);
3814 zink_screen(ctx->base.screen)->context_invalidate_descriptor_state(ctx, shader, ZINK_DESCRIPTOR_TYPE_UBO, slot, 1);
3819 rebind_ssbo(struct zink_context *ctx, enum pipe_shader_type shader, unsigned slot)
3821 const struct pipe_shader_buffer *ssbo = &ctx->ssbos[shader][slot];
3827 update_descriptor_state_ssbo(ctx, shader, slot, res);
3828 zink_screen(ctx->base.screen)->context_invalidate_descriptor_state(ctx, shader, ZINK_DESCRIPTOR_TYPE_SSBO, slot, 1);
3833 rebind_tbo(struct zink_context *ctx, enum pipe_shader_type shader, unsigned slot)
3835 struct zink_sampler_view *sampler_view = zink_sampler_view(ctx->sampler_views[shader][slot]);
3845 update_descriptor_state_sampler(ctx, shader, slot, res);
3846 zink_screen(ctx->base.screen)->context_invalidate_descriptor_state(ctx, shader, ZINK_DESCRIPTOR_TYPE_SAMPLER_VIEW, slot, 1);
3851 rebind_ibo(struct zink_context *ctx, enum pipe_shader_type shader, unsigned slot)
3853 struct zink_image_view *image_view = &ctx->image_views[shader][slot];
3871 update_descriptor_state_image(ctx, shader, slot, res);
3872 zink_screen(ctx->base.screen)->context_invalidate_descriptor_state(ctx, shader, ZINK_DESCRIPTOR_TYPE_IMAGE, slot, 1);
3902 u_foreach_bit(slot, res->vbo_bind_mask) {
3903 if (ctx->vertex_buffers[slot].buffer.resource != &res->base.b) //wrong context
3918 u_foreach_bit(slot, res->ubo_bind_mask[shader]) {
3919 if (&res->base.b != ctx->ubos[shader][slot].buffer) //wrong context
3921 rebind_ubo(ctx, shader, slot);
3933 u_foreach_bit(slot, res->ssbo_bind_mask[shader]) {
3934 struct pipe_shader_buffer *ssbo = &ctx->ssbos[shader][slot];
3937 rebind_ssbo(ctx, shader, slot);
3938 has_write |= (ctx->writable_ssbos[shader] & BITFIELD64_BIT(slot)) != 0;
3949 u_foreach_bit(slot, res->sampler_binds[shader]) {
3950 struct zink_sampler_view *sampler_view = zink_sampler_view(ctx->sampler_views[shader][slot]);
3953 rebind_tbo(ctx, shader, slot);
3966 for (unsigned slot = 0; num_image_rebinds_remaining && slot < ctx->di.num_images[shader]; slot++) {
3967 struct zink_resource *cres = ctx->di.descriptor_res[ZINK_DESCRIPTOR_TYPE_IMAGE][shader][slot];
3971 rebind_ibo(ctx, shader, slot);
3972 const struct zink_image_view *image_view = &ctx->image_views[shader][slot];
4297 for (unsigned slot = 0; slot < ctx->di.num_ubos[shader]; slot++) {
4298 struct zink_resource *res = rebind_ubo(ctx, shader, slot);
4302 for (unsigned slot = 0; slot < ctx->di.num_sampler_views[shader]; slot++) {
4303 struct zink_resource *res = rebind_tbo(ctx, shader, slot);
4307 for (unsigned slot = 0; slot < ctx->di.num_ssbos[shader]; slot++) {
4308 struct zink_resource *res = rebind_ssbo(ctx, shader, slot);
4310 zink_batch_resource_usage_set(batch, res, (ctx->writable_ssbos[shader] & BITFIELD64_BIT(slot)) != 0);
4312 for (unsigned slot = 0; slot < ctx->di.num_images[shader]; slot++) {
4313 struct zink_resource *res = rebind_ibo(ctx, shader, slot);
4315 zink_batch_resource_usage_set(batch, res, (ctx->image_views[shader][slot].base.access & PIPE_IMAGE_ACCESS_WRITE) != 0);
4601 /* allocate 1024 slots and reserve slot 0 */