Lines Matching refs:info
82 return BITSET_TEST(shader->info.system_values_read, SYSTEM_VALUE_WORK_DIM);
112 if (shader->info.stage != MESA_SHADER_KERNEL)
235 if (shader->info.stage != MESA_SHADER_VERTEX)
274 if (shader->info.stage != MESA_SHADER_VERTEX)
277 if (!BITSET_TEST(shader->info.system_values_read, SYSTEM_VALUE_BASE_VERTEX))
309 if (shader->info.stage != MESA_SHADER_VERTEX)
312 if (!BITSET_TEST(shader->info.system_values_read, SYSTEM_VALUE_DRAW_ID))
367 if (!screen->info.feats.features.shaderInt64)
370 if (!screen->info.feats.features.shaderFloat64) {
386 if (screen->info.driver_props.driverID == VK_DRIVER_ID_MESA_RADV ||
387 screen->info.driver_props.driverID == VK_DRIVER_ID_AMD_OPEN_SOURCE ||
388 screen->info.driver_props.driverID == VK_DRIVER_ID_AMD_PROPRIETARY)
734 uint32_t last_output = util_last_bit64(nir->info.outputs_written);
853 if (zs->nir->info.stage != MESA_SHADER_GEOMETRY || util_bitcount(zs->nir->info.gs.active_stream_mask) == 1) {
903 if (zs->nir->info.stage != MESA_SHADER_GEOMETRY || util_bitcount(zs->nir->info.gs.active_stream_mask) == 1) {
1048 const bool has_int64 = screen->info.feats.features.shaderInt64;
1486 nir_shader *nir = producer->info.stage == MESA_SHADER_TESS_CTRL ? producer : consumer;
1487 if (consumer->info.stage != MESA_SHADER_FRAGMENT) {
1497 if (producer->info.stage == MESA_SHADER_TESS_CTRL) {
1500 assign_producer_var_io(consumer->info.stage, var, &reserved, slot_map);
1502 if (!assign_consumer_var_io(producer->info.stage, var, &reserved, slot_map))
1508 assign_producer_var_io(producer->info.stage, var, &reserved, slot_map);
1510 if (!assign_consumer_var_io(consumer->info.stage, var, &reserved, slot_map)) {
1995 if (!zs->nir->info.workgroup_size[0]) {
2010 zs->nir->info.stage, "main", &spirv_options, &screen->nir_options);
2068 nir->info.num_inlinable_uniforms,
2070 nir->info.inlinable_uniform_dw_offsets);
2076 switch (zs->nir->info.stage) {
2115 nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK)) {
2127 if (zink_fs_key(key)->force_dual_color_blend && nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DATA1)) {
2137 nir->info.fs.uses_sample_qualifier = true;
2138 nir->info.fs.uses_sample_shading = true;
2140 if (nir->info.fs.uses_fbfetch_output) {
2186 if (zs->nir->info.stage == MESA_SHADER_TESS_CTRL && zs->is_generated)
2210 if (shader->info.stage != MESA_SHADER_VERTEX)
2225 if (!shader->info.num_ssbos && !shader->info.num_ubos)
2261 if (shader->info.num_ubos) {
2272 unsigned num_ubos = shader->info.num_ubos - !!shader->info.first_ubo_is_default_ubo;
2286 var->data.driver_location = first_ubo + !!shader->info.first_ubo_is_default_ubo;
2289 if (shader->info.num_ssbos && zs->ssbos_used) {
2293 unsigned num_ssbos = shader->info.num_ssbos - first_ssbo;
2339 zs->ssbos_used |= get_src_mask_ssbo(shader->info.num_ssbos, intrin->src[1]);
2343 zs->ssbos_used |= get_src_mask_ssbo(shader->info.num_ssbos, intrin->src[0]);
2362 zs->ssbos_used |= get_src_mask_ssbo(shader->info.num_ssbos, intrin->src[0]);
2366 zs->ubos_used |= get_src_mask_ubo(shader->info.num_ubos, intrin->src[0]);
2660 switch (nir->info.stage) {
2662 return prim_to_pipe(nir->info.gs.output_primitive);
2664 return nir->info.tess.point_mode ? PIPE_PRIM_POINTS : tess_prim_to_pipe(nir->info.tess._primitive_mode);
2781 BITSET_SET_RANGE(shader->info.images_used, var->data.binding,
2789 if (!screen->info.have_EXT_shader_atomic_float && !screen->is_cpu && !warned) {
3022 ret->sinfo.have_vulkan_memory_model = screen->info.have_KHR_vulkan_memory_model;
3031 if (nir->info.stage == MESA_SHADER_TESS_CTRL ||
3032 nir->info.stage == MESA_SHADER_TESS_EVAL)
3038 if (nir->info.stage == MESA_SHADER_VERTEX)
3040 else if (nir->info.stage == MESA_SHADER_TESS_CTRL ||
3041 nir->info.stage == MESA_SHADER_TESS_EVAL)
3043 else if (nir->info.stage == MESA_SHADER_KERNEL)
3046 if (nir->info.stage < MESA_SHADER_FRAGMENT)
3061 subgroup_options.subgroup_size = screen->info.props11.subgroupSize;
3065 if (!(screen->info.subgroup.supportedStages & mesa_to_vk_shader_stage(nir->info.stage))) {
3079 nir->info.fs.color_is_dual_source ? 1 : 8);
3125 var->data.binding = !var->data.driver_location ? nir->info.stage :
3126 zink_binding(nir->info.stage,
3143 var->data.binding = zink_binding(nir->info.stage,
3166 var->data.binding = zink_binding(nir->info.stage, vktype, var->data.driver_location, screen->compact_descriptors);
3183 if (!screen->info.feats.features.shaderInt64)
3191 update_so_info(ret, so_info, nir->info.outputs_written, have_psiz);
3233 if (!screen->info.feats.features.shaderImageGatherExtended)
3236 if (nir->info.stage == MESA_SHADER_GEOMETRY)
3250 if (shader->nir->info.stage == MESA_SHADER_COMPUTE) {
3260 enum pipe_shader_type pstage = pipe_shader_type_from_mesa(shader->nir->info.stage);
3262 if (!prog->base.removed && (shader->nir->info.stage != MESA_SHADER_TESS_CTRL || !shader->is_generated)) {
3272 if (shader->nir->info.stage != MESA_SHADER_TESS_CTRL || !shader->is_generated)
3275 if (shader->nir->info.stage == MESA_SHADER_TESS_EVAL && shader->generated)
3280 if (shader->nir->info.stage == MESA_SHADER_TESS_EVAL && shader->generated) {
3295 assert(zs->nir->info.stage == MESA_SHADER_TESS_CTRL);
3403 nir->info.tess.tcs_vertices_out = vertices_per_patch;