Lines Matching defs:zs
480 get_bo_vars(struct zink_shader *zs, nir_shader *shader)
484 if (zs->ubos_used)
485 bo.first_ubo = ffs(zs->ubos_used & ~BITFIELD_BIT(0)) - 2;
487 if (zs->ssbos_used)
488 bo.first_ssbo = ffs(zs->ssbos_used) - 1;
570 bound_bo_access(nir_shader *shader, struct zink_shader *zs)
572 struct bo_vars bo = get_bo_vars(zs, shader);
577 optimize_nir(struct nir_shader *s, struct zink_shader *zs)
602 if (zs)
603 NIR_PASS(progress, s, bound_bo_access, zs);
821 update_so_info(struct zink_shader *zs, const struct pipe_stream_output_info *so_info,
836 nir_foreach_shader_out_variable(var, zs->nir) {
852 zs->sinfo.so_info.stride[output->output_buffer] = so_info->stride[output->output_buffer];
853 if (zs->nir->info.stage != MESA_SHADER_GEOMETRY || util_bitcount(zs->nir->info.gs.active_stream_mask) == 1) {
857 var = find_var_with_location_frac(zs->nir, slot--, output->start_component, have_psiz);
903 if (zs->nir->info.stage != MESA_SHADER_GEOMETRY || util_bitcount(zs->nir->info.gs.active_stream_mask) == 1) {
906 var = find_var_with_location_frac(zs->nir, slot--, output->start_component, have_psiz);
949 zs->sinfo.so_propagate |= BITFIELD_BIT(var->data.location - VARYING_SLOT_VAR0);
961 zs->sinfo.so_info.output[zs->sinfo.so_info.num_outputs] = *output;
963 zs->sinfo.so_info_slots[zs->sinfo.so_info.num_outputs++] = reverse_map[output->register_index];
965 zs->sinfo.have_xfb = zs->sinfo.so_info.num_outputs || zs->sinfo.so_propagate;
968 update_psiz_location(zs->nir, psiz);
1364 remove_bo_access(nir_shader *shader, struct zink_shader *zs)
1366 struct bo_vars bo = get_bo_vars(zs, shader);
1924 zink_shader_spirv_compile(struct zink_screen *screen, struct zink_shader *zs, struct spirv_shader *spirv)
1930 spirv = zs->spirv;
1995 if (!zs->nir->info.workgroup_size[0]) {
2010 zs->nir->info.stage, "main", &spirv_options, &screen->nir_options);
2057 zink_shader_compile(struct zink_screen *screen, struct zink_shader *zs, nir_shader *base_nir, const struct zink_shader_key *key)
2060 struct zink_shader_info *sinfo = &zs->sinfo;
2076 switch (zs->nir->info.stage) {
2102 if (zs->sinfo.have_xfb)
2160 NIR_PASS_V(nir, remove_bo_access, zs);
2164 optimize_nir(nir, zs);
2172 zs->can_inline = false;
2174 optimize_nir(nir, zs);
2181 mod = zink_shader_spirv_compile(screen, zs, spirv);
2186 if (zs->nir->info.stage == MESA_SHADER_TESS_CTRL && zs->is_generated)
2187 zs->spirv = spirv;
2219 unbreak_bos(nir_shader *shader, struct zink_shader *zs, bool needs_size)
2262 if (shader->num_uniforms && zs->ubos_used & BITFIELD_BIT(0)) {
2273 uint32_t ubos_used = zs->ubos_used & ~BITFIELD_BIT(0);
2289 if (shader->info.num_ssbos && zs->ssbos_used) {
2291 unsigned first_ssbo = ffs(zs->ssbos_used) - 1;
2327 analyze_io(struct zink_shader *zs, nir_shader *shader)
2339 zs->ssbos_used |= get_src_mask_ssbo(shader->info.num_ssbos, intrin->src[1]);
2343 zs->ssbos_used |= get_src_mask_ssbo(shader->info.num_ssbos, intrin->src[0]);
2362 zs->ssbos_used |= get_src_mask_ssbo(shader->info.num_ssbos, intrin->src[0]);
2366 zs->ubos_used |= get_src_mask_ubo(shader->info.num_ubos, intrin->src[0]);
2742 scan_nir(struct zink_screen *screen, nir_shader *shader, struct zink_shader *zs)
2751 zs->sinfo.have_sparse |= tex->is_sparse;
2786 zs->sinfo.have_sparse = true;
3293 zink_shader_tcs_compile(struct zink_screen *screen, struct zink_shader *zs, unsigned patch_vertices)
3295 assert(zs->nir->info.stage == MESA_SHADER_TESS_CTRL);
3297 zs->spirv->words[zs->spirv->tcs_vertices_out_word] = patch_vertices;
3298 return zink_shader_spirv_compile(screen, zs, NULL);