Lines Matching defs:nir
33 #include "nir.h"
34 #include "compiler/nir/nir_builder.h"
36 #include "nir/tgsi_to_nir.h"
49 create_vs_pushconst(nir_shader *nir)
53 struct glsl_struct_field *fields = rzalloc_array(nir, struct glsl_struct_field, 2);
55 fields[0].name = ralloc_asprintf(nir, "draw_mode_is_indexed");
58 fields[1].name = ralloc_asprintf(nir, "draw_id");
60 vs_pushconst = nir_variable_create(nir, nir_var_mem_push_const,
66 create_cs_pushconst(nir_shader *nir)
70 struct glsl_struct_field *fields = rzalloc_size(nir, 1 * sizeof(struct glsl_struct_field));
72 fields[0].name = ralloc_asprintf(nir, "work_dim");
74 cs_pushconst = nir_variable_create(nir, nir_var_mem_push_const,
685 find_var_with_location_frac(nir_shader *nir, unsigned location, unsigned location_frac, bool have_psiz)
689 nir_foreach_shader_out_variable(var, nir) {
698 nir_foreach_shader_out_variable(var, nir) {
710 nir_foreach_shader_out_variable(var, nir) {
732 update_psiz_location(nir_shader *nir, nir_variable *psiz)
734 uint32_t last_output = util_last_bit64(nir->info.outputs_written);
836 nir_foreach_shader_out_variable(var, zs->nir) {
853 if (zs->nir->info.stage != MESA_SHADER_GEOMETRY || util_bitcount(zs->nir->info.gs.active_stream_mask) == 1) {
857 var = find_var_with_location_frac(zs->nir, slot--, output->start_component, have_psiz);
903 if (zs->nir->info.stage != MESA_SHADER_GEOMETRY || util_bitcount(zs->nir->info.gs.active_stream_mask) == 1) {
906 var = find_var_with_location_frac(zs->nir, slot--, output->start_component, have_psiz);
968 update_psiz_location(zs->nir, psiz);
1007 decompose_attribs(nir_shader *nir, uint32_t decomposed_attrs, uint32_t decomposed_attrs_without_w)
1010 nir_foreach_variable_with_modes(var, nir, nir_var_shader_in)
1017 nir_variable *var = nir_find_variable_with_driver_location(nir, nir_var_shader_in, location);
1025 split[i+1] = nir_variable_clone(var, nir);
1026 split[i+1]->name = ralloc_asprintf(nir, "%s_split%u", var->name, i);
1033 nir_shader_add_variable(nir, split[i+1]);
1036 nir_shader_instructions_pass(nir, lower_attrib, nir_metadata_dominance, &state);
1038 nir_fixup_deref_modes(nir);
1039 NIR_PASS_V(nir, nir_remove_dead_variables, nir_var_shader_temp, NULL);
1040 optimize_nir(nir, NULL);
1486 nir_shader *nir = producer->info.stage == MESA_SHADER_TESS_CTRL ? producer : consumer;
1519 nir_fixup_deref_modes(nir);
1520 NIR_PASS_V(nir, nir_remove_dead_variables, nir_var_shader_temp, NULL);
1521 optimize_nir(nir, NULL);
1526 rewrite_64bit_type(nir_shader *nir, const struct glsl_type *type, nir_variable *var)
1532 return glsl_array_type(rewrite_64bit_type(nir, child, var), elements, stride);
1537 struct glsl_struct_field *fields = rzalloc_array(nir, struct glsl_struct_field, nmembers * 2);
1547 fields[i].type = rewrite_64bit_type(nir, f->type, var);
1843 split_blocks(nir_shader *nir)
1849 nir_foreach_shader_out_variable(var, nir) {
1861 members[i] = nir_variable_clone(var, nir);
1866 nir_shader_add_variable(nir, members[i]);
1868 nir_foreach_function(function, nir) {
1995 if (!zs->nir->info.workgroup_size[0]) {
2008 nir_shader *nir = spirv_to_nir(spirv->words, spirv->num_words,
2010 zs->nir->info.stage, "main", &spirv_options, &screen->nir_options);
2011 assert(nir);
2012 ralloc_free(nir);
2024 find_var_deref(nir_shader *nir, nir_variable *var)
2026 nir_foreach_function(function, nir) {
2044 prune_io(nir_shader *nir)
2046 nir_foreach_shader_in_variable_safe(var, nir) {
2047 if (!find_var_deref(nir, var))
2050 nir_foreach_shader_out_variable_safe(var, nir) {
2051 if (!find_var_deref(nir, var))
2061 nir_shader *nir = nir_shader_clone(NULL, base_nir);
2067 NIR_PASS_V(nir, nir_inline_uniforms,
2068 nir->info.num_inlinable_uniforms,
2070 nir->info.inlinable_uniform_dw_offsets);
2076 switch (zs->nir->info.stage) {
2096 NIR_PASS_V(nir, decompose_attribs, decomposed_attrs, decomposed_attrs_without_w);
2106 NIR_PASS_V(nir, nir_lower_clip_halfz);
2109 NIR_PASS_V(nir, lower_drawid);
2115 nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK)) {
2119 nir_foreach_shader_out_variable(var, nir) {
2123 nir_fixup_deref_modes(nir);
2124 NIR_PASS_V(nir, nir_remove_dead_variables, nir_var_shader_temp, NULL);
2127 if (zink_fs_key(key)->force_dual_color_blend && nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DATA1)) {
2128 NIR_PASS_V(nir, lower_dual_blend);
2131 NIR_PASS_V(nir, nir_lower_texcoord_replace, zink_fs_key(key)->coord_replace_bits,
2135 nir_foreach_shader_in_variable(var, nir)
2137 nir->info.fs.uses_sample_qualifier = true;
2138 nir->info.fs.uses_sample_shading = true;
2140 if (nir->info.fs.uses_fbfetch_output) {
2142 NIR_PASS_V(nir, lower_fbfetch, &fbfetch, zink_fs_key(key)->fbfetch_ms);
2145 nir_fixup_deref_modes(nir);
2146 NIR_PASS_V(nir, nir_remove_dead_variables, nir_var_shader_temp, NULL);
2153 NIR_PASS_V(nir, zink_lower_cubemap_to_array, key->base.nonseamless_cube_mask);
2158 NIR_PASS_V(nir, nir_lower_io_to_scalar, nir_var_mem_ubo | nir_var_mem_ssbo | nir_var_mem_shared);
2159 NIR_PASS_V(nir, rewrite_bo_access, screen);
2160 NIR_PASS_V(nir, remove_bo_access, zs);
2164 optimize_nir(nir, zs);
2167 NIR_PASS_V(nir, nir_io_add_const_offset_to_base, nir_var_shader_in |
2170 nir_function_impl *impl = nir_shader_get_entrypoint(nir);
2174 optimize_nir(nir, zs);
2175 prune_io(nir);
2177 NIR_PASS_V(nir, nir_convert_from_ssa, true);
2179 struct spirv_shader *spirv = nir_to_spirv(nir, sinfo, screen->spirv_version);
2183 ralloc_free(nir);
2186 if (zs->nir->info.stage == MESA_SHADER_TESS_CTRL && zs->is_generated)
2383 create_bindless_texture(nir_shader *nir, nir_tex_instr *tex, unsigned descriptor_set)
2389 var = nir_variable_create(nir, nir_var_uniform, glsl_array_type(sampler_type, ZINK_MAX_BINDLESS_HANDLES, 0), "bindless_texture");
2397 create_bindless_image(nir_shader *nir, enum glsl_sampler_dim dim, unsigned descriptor_set)
2403 var = nir_variable_create(nir, nir_var_image, glsl_array_type(image_type, ZINK_MAX_BINDLESS_HANDLES, 0), "bindless_image");
2584 handle_bindless_var(nir_shader *nir, nir_variable *var, const struct glsl_type *type, struct zink_bindless_info *bindless)
2588 handle_bindless_var(nir, var, glsl_get_struct_field(type, i), bindless);
2615 bindless->bindless[binding] = nir_variable_clone(var, nir);
2622 nir_shader_add_variable(nir, bindless->bindless[binding]);
2658 get_shader_base_prim_type(struct nir_shader *nir)
2660 switch (nir->info.stage) {
2662 return prim_to_pipe(nir->info.gs.output_primitive);
2664 return nir->info.tess.point_mode ? PIPE_PRIM_POINTS : tess_prim_to_pipe(nir->info.tess._primitive_mode);
3016 zink_shader_create(struct zink_screen *screen, struct nir_shader *nir,
3025 ret->reduced_prim = get_shader_base_prim_type(nir);
3031 if (nir->info.stage == MESA_SHADER_TESS_CTRL ||
3032 nir->info.stage == MESA_SHADER_TESS_EVAL)
3035 NIR_PASS_V(nir, nir_lower_indirect_derefs, indirect_derefs_modes,
3038 if (nir->info.stage == MESA_SHADER_VERTEX)
3039 create_vs_pushconst(nir);
3040 else if (nir->info.stage == MESA_SHADER_TESS_CTRL ||
3041 nir->info.stage == MESA_SHADER_TESS_EVAL)
3042 NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects, false);
3043 else if (nir->info.stage == MESA_SHADER_KERNEL)
3044 create_cs_pushconst(nir);
3046 if (nir->info.stage < MESA_SHADER_FRAGMENT)
3047 have_psiz = check_psiz(nir);
3048 NIR_PASS_V(nir, lower_basevertex);
3049 NIR_PASS_V(nir, lower_work_dim);
3050 NIR_PASS_V(nir, nir_lower_regs_to_ssa);
3051 NIR_PASS_V(nir, lower_baseinstance);
3052 NIR_PASS_V(nir, lower_sparse);
3053 NIR_PASS_V(nir, split_bitfields);
3056 NIR_PASS_V(nir, lower_1d_shadow, screen);
3065 if (!(screen->info.subgroup.supportedStages & mesa_to_vk_shader_stage(nir->info.stage))) {
3069 NIR_PASS_V(nir, nir_lower_subgroups, &subgroup_options);
3073 NIR_PASS_V(nir, split_blocks);
3075 optimize_nir(nir, NULL);
3076 NIR_PASS_V(nir, nir_remove_dead_variables, nir_var_function_temp, NULL);
3077 NIR_PASS_V(nir, nir_lower_discard_if);
3078 NIR_PASS_V(nir, nir_lower_fragcolor,
3079 nir->info.fs.color_is_dual_source ? 1 : 8);
3080 NIR_PASS_V(nir, lower_64bit_vertex_attribs);
3081 bool needs_size = analyze_io(ret, nir);
3082 NIR_PASS_V(nir, unbreak_bos, ret, needs_size);
3085 NIR_PASS_V(nir, nir_lower_io_to_scalar, nir_var_mem_ubo | nir_var_mem_ssbo | nir_var_mem_shared);
3086 NIR_PASS_V(nir, rewrite_bo_access, screen);
3087 NIR_PASS_V(nir, remove_bo_access, ret);
3092 nir_print_shader(nir, stderr);
3099 nir_foreach_variable_with_modes(var, nir, nir_var_shader_in | nir_var_shader_out) {
3107 NIR_PASS_V(nir, lower_bindless_io);
3109 optimize_nir(nir, NULL);
3110 prune_io(nir);
3112 scan_nir(screen, nir, ret);
3114 foreach_list_typed_reverse_safe(nir_variable, var, node, &nir->variables) {
3125 var->data.binding = !var->data.driver_location ? nir->info.stage :
3126 zink_binding(nir->info.stage,
3143 var->data.binding = zink_binding(nir->info.stage,
3158 handle_bindless_var(nir, var, type, &bindless);
3166 var->data.binding = zink_binding(nir->info.stage, vktype, var->data.driver_location, screen->compact_descriptors);
3180 NIR_PASS(bindless_lowered, nir, lower_bindless, &bindless);
3184 NIR_PASS_V(nir, lower_64bit_vars);
3185 NIR_PASS_V(nir, match_tex_dests);
3187 ret->nir = nir;
3188 nir_foreach_shader_out_variable(var, nir)
3191 update_so_info(ret, so_info, nir->info.outputs_written, have_psiz);
3195 nir_foreach_shader_out_variable(var, nir) {
3205 nir_fixup_deref_modes(nir);
3206 NIR_PASS_V(nir, nir_remove_dead_variables, nir_var_shader_temp, NULL);
3219 nir_shader *nir = nirptr;
3235 NIR_PASS_V(nir, nir_lower_tex, &tex_opts);
3236 if (nir->info.stage == MESA_SHADER_GEOMETRY)
3237 NIR_PASS_V(nir, nir_lower_gs_intrinsics, nir_lower_gs_intrinsics_per_stream);
3238 optimize_nir(nir, NULL);
3239 nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
3241 nir_find_inlinable_uniforms(nir);
3250 if (shader->nir->info.stage == MESA_SHADER_COMPUTE) {
3260 enum pipe_shader_type pstage = pipe_shader_type_from_mesa(shader->nir->info.stage);
3262 if (!prog->base.removed && (shader->nir->info.stage != MESA_SHADER_TESS_CTRL || !shader->is_generated)) {
3272 if (shader->nir->info.stage != MESA_SHADER_TESS_CTRL || !shader->is_generated)
3275 if (shader->nir->info.stage == MESA_SHADER_TESS_EVAL && shader->generated)
3280 if (shader->nir->info.stage == MESA_SHADER_TESS_EVAL && shader->generated) {
3286 ralloc_free(shader->nir);
3295 assert(zs->nir->info.stage == MESA_SHADER_TESS_CTRL);
3296 /* shortcut all the nir passes since we just have to change this one word */
3330 nir_shader *nir = nir_shader_create(NULL, MESA_SHADER_TESS_CTRL, &screen->nir_options, NULL);
3331 nir_function *fn = nir_function_create(nir, "main");
3341 nir_foreach_shader_out_variable(var, vs->nir) {
3350 nir_variable *in = nir_variable_create(nir, nir_var_shader_in, in_type, var->name);
3351 nir_variable *out = nir_variable_create(nir, nir_var_shader_out, out_type, buf);
3368 nir_variable *gl_TessLevelInner = nir_variable_create(nir, nir_var_shader_out, glsl_array_type(glsl_float_type(), 2, 0), "gl_TessLevelInner");
3371 nir_variable *gl_TessLevelOuter = nir_variable_create(nir, nir_var_shader_out, glsl_array_type(glsl_float_type(), 4, 0), "gl_TessLevelOuter");
3376 struct glsl_struct_field *fields = rzalloc_array(nir, struct glsl_struct_field, 3);
3379 fields[0].name = ralloc_asprintf(nir, "padding");
3382 fields[1].name = ralloc_asprintf(nir, "gl_TessLevelInner");
3385 fields[2].name = ralloc_asprintf(nir, "gl_TessLevelOuter");
3387 nir_variable *pushconst = nir_variable_create(nir, nir_var_mem_push_const,
3403 nir->info.tess.tcs_vertices_out = vertices_per_patch;
3404 nir_validate_shader(nir, "created");
3406 NIR_PASS_V(nir, nir_lower_regs_to_ssa);
3407 optimize_nir(nir, NULL);
3408 NIR_PASS_V(nir, nir_remove_dead_variables, nir_var_function_temp, NULL);
3409 NIR_PASS_V(nir, nir_convert_from_ssa, true);
3411 ret->nir = nir;