Lines Matching defs:vtctx
92 struct virgl_transform_context *vtctx = (struct virgl_transform_context *)ctx;
102 virgl_tgsi_transform_declaration_input_temp(decl, &vtctx->input_temp[INPUT_TEMP_LAYER],
104 virgl_tgsi_transform_declaration_input_temp(decl, &vtctx->input_temp[INPUT_TEMP_VIEWPORT_INDEX],
108 virgl_tgsi_transform_declaration_input_temp(decl, &vtctx->input_temp[INPUT_TEMP_BLOCK_ID],
110 virgl_tgsi_transform_declaration_input_temp(decl, &vtctx->input_temp[INPUT_TEMP_HELPER_INVOCATION],
116 vtctx->writemask_fixup_outs[vtctx->num_writemask_fixups++] = decl->Range.First;
118 vtctx->writemask_fixup_outs[vtctx->num_writemask_fixups++] = decl->Range.Last;
121 vtctx->writemask_fixup_outs[vtctx->num_writemask_fixups++] = decl->Range.First;
125 if (vtctx->base.processor != PIPE_SHADER_FRAGMENT)
126 vtctx->writemask_fixup_outs[vtctx->num_writemask_fixups++] = decl->Range.First;
131 vtctx->next_temp = MAX2(vtctx->next_temp, decl->Range.Last + 1);
136 assert(vtctx->num_writemask_fixups <= ARRAY_SIZE(vtctx->writemask_fixup_outs));
147 struct virgl_transform_context *vtctx = (struct virgl_transform_context *)ctx;
151 if (vtctx->cull_enabled)
188 struct virgl_transform_context *vtctx = (struct virgl_transform_context *)ctx;
190 if (vtctx->is_separable) {
198 vtctx->src_temp = vtctx->next_temp;
199 vtctx->next_temp += 4;
200 tgsi_transform_temps_decl(ctx, vtctx->src_temp, vtctx->src_temp + 3);
202 if (vtctx->num_writemask_fixups) {
203 vtctx->writemask_fixup_temps = vtctx->next_temp;
204 vtctx->next_temp += vtctx->num_writemask_fixups;
206 vtctx->writemask_fixup_temps,
207 vtctx->writemask_fixup_temps + vtctx->num_writemask_fixups - 1);
213 for (int i = 0; i < ARRAY_SIZE(vtctx->input_temp); i++) {
214 if (vtctx->input_temp[i].index != ~0) {
215 vtctx->input_temp[i].temp = vtctx->next_temp++;
216 tgsi_transform_temp_decl(ctx, vtctx->input_temp[i].temp);
226 virgl_mov_input_temp_sint(ctx, &vtctx->input_temp[INPUT_TEMP_LAYER]);
227 virgl_mov_input_temp_sint(ctx, &vtctx->input_temp[INPUT_TEMP_VIEWPORT_INDEX]);
234 if (vtctx->input_temp[INPUT_TEMP_BLOCK_ID].index != ~0) {
239 inst.Dst[0].Register.Index = vtctx->input_temp[INPUT_TEMP_BLOCK_ID].temp;
243 vtctx->input_temp[INPUT_TEMP_BLOCK_ID].file,
244 vtctx->input_temp[INPUT_TEMP_BLOCK_ID].index);
252 virgl_mov_input_temp_uint(ctx, &vtctx->input_temp[INPUT_TEMP_HELPER_INVOCATION]);
254 vtctx->precise_flags = calloc((vtctx->next_temp + 7)/8, sizeof(uint32_t));
270 struct virgl_transform_context *vtctx = (struct virgl_transform_context *)ctx;
271 if (vtctx->fake_fp64 &&
278 if (!vtctx->has_precise && inst->Instruction.Precise)
299 vtctx->precise_flags[index] |= bits;
309 if (vtctx->precise_flags[index] & bits) {
327 TGSI_FILE_TEMPORARY, vtctx->src_temp,
332 inst->Src[0].Register.Index = vtctx->src_temp;
343 for (int j = 0; j < vtctx->num_writemask_fixups; j++) {
344 if (inst->Dst[i].Register.Index == vtctx->writemask_fixup_outs[j]) {
346 inst->Dst[i].Register.Index = vtctx->writemask_fixup_temps + j;
359 for (int j = 0; j < ARRAY_SIZE(vtctx->input_temp); j++)
360 virgl_tgsi_rewrite_src_for_input_temp(&vtctx->input_temp[j], &inst->Src[i]);
370 temp_inst.Dst[0].Register.Index = vtctx->src_temp + i;
381 inst->Src[i].Register.Index = vtctx->src_temp + i;
398 op_to_temp.Dst[0].Register.Index = vtctx->src_temp;
408 inst->Src[0].Register.Index = vtctx->src_temp;
417 if (vtctx->num_writemask_fixups &&
419 inst->Dst[i].Register.Index >= vtctx->writemask_fixup_temps &&
420 inst->Dst[i].Register.Index < vtctx->writemask_fixup_temps + vtctx->num_writemask_fixups) {
422 unsigned real_out = vtctx->writemask_fixup_outs[inst->Dst[i].Register.Index - vtctx->writemask_fixup_temps];