Lines Matching defs:tmp
362 uint32_t tmp;
368 tmp =
375 virgl_encoder_write_dword(ctx->cbuf, tmp);
377 tmp = VIRGL_OBJ_BLEND_S1_LOGICOP_FUNC(blend_state->logicop_func);
378 virgl_encoder_write_dword(ctx->cbuf, tmp);
387 tmp =
396 virgl_encoder_write_dword(ctx->cbuf, tmp);
405 uint32_t tmp;
410 tmp = VIRGL_OBJ_DSA_S0_DEPTH_ENABLE(dsa_state->depth_enabled) |
415 virgl_encoder_write_dword(ctx->cbuf, tmp);
418 tmp = VIRGL_OBJ_DSA_S1_STENCIL_ENABLED(dsa_state->stencil[i].enabled) |
425 virgl_encoder_write_dword(ctx->cbuf, tmp);
435 uint32_t tmp;
440 tmp = VIRGL_OBJ_RS_S0_FLATSHADE(state->flatshade) |
470 virgl_encoder_write_dword(ctx->cbuf, tmp); /* S0 */
473 tmp = VIRGL_OBJ_RS_S3_LINE_STIPPLE_PATTERN(state->line_stipple_pattern) |
476 virgl_encoder_write_dword(ctx->cbuf, tmp); /* S3 */
501 uint32_t tmp;
512 tmp =
518 virgl_encoder_write_dword(ctx->cbuf, tmp);
956 uint32_t tmp;
961 tmp = VIRGL_OBJ_SAMPLE_STATE_S0_WRAP_S(state->wrap_s) |
972 virgl_encoder_write_dword(ctx->cbuf, tmp);
989 uint32_t tmp;
1009 tmp = VIRGL_OBJ_SAMPLER_VIEW_SWIZZLE_R(state->swizzle_r) |
1013 virgl_encoder_write_dword(ctx->cbuf, tmp);
1179 uint32_t tmp;
1181 tmp = VIRGL_CMD_BLIT_S0_MASK(blit->mask) |
1186 virgl_encoder_write_dword(ctx->cbuf, tmp);