Lines Matching defs:info
52 vc4_tile_blit(struct pipe_context *pctx, const struct pipe_blit_info *info)
55 bool msaa = (info->src.resource->nr_samples > 1 ||
56 info->dst.resource->nr_samples > 1);
60 if (util_format_is_depth_or_stencil(info->dst.resource->format))
63 if (info->scissor_enable)
66 if ((info->mask & PIPE_MASK_RGBA) == 0)
69 if (info->dst.box.x != info->src.box.x ||
70 info->dst.box.y != info->src.box.y ||
71 info->dst.box.width != info->src.box.width ||
72 info->dst.box.height != info->src.box.height) {
76 int dst_surface_width = u_minify(info->dst.resource->width0,
77 info->dst.level);
78 int dst_surface_height = u_minify(info->dst.resource->height0,
79 info->dst.level);
80 if (is_tile_unaligned(info->dst.box.x, tile_width) ||
81 is_tile_unaligned(info->dst.box.y, tile_height) ||
82 (is_tile_unaligned(info->dst.box.width, tile_width) &&
83 info->dst.box.x + info->dst.box.width != dst_surface_width) ||
84 (is_tile_unaligned(info->dst.box.height, tile_height) &&
85 info->dst.box.y + info->dst.box.height != dst_surface_height)) {
98 struct vc4_resource *rsc = vc4_resource(info->src.resource);
102 if (info->src.resource->nr_samples > 1)
104 else if (rsc->slices[info->src.level].tiling == VC4_TILING_FORMAT_T)
109 if (stride != rsc->slices[info->src.level].stride)
112 if (info->dst.resource->format != info->src.resource->format)
117 info->src.box.x,
118 info->src.box.y,
119 info->dst.box.x,
120 info->dst.box.y,
121 info->dst.box.width,
122 info->dst.box.height);
126 vc4_get_blit_surface(pctx, info->dst.resource, info->dst.level);
128 vc4_get_blit_surface(pctx, info->src.resource, info->src.level);
130 vc4_flush_jobs_reading_resource(vc4, info->src.resource);
135 job->draw_min_x = info->dst.box.x;
136 job->draw_min_y = info->dst.box.y;
137 job->draw_max_x = info->dst.box.x + info->dst.box.width;
138 job->draw_max_y = info->dst.box.y + info->dst.box.height;
307 vc4_yuv_blit(struct pipe_context *pctx, const struct pipe_blit_info *info)
310 struct vc4_resource *src = vc4_resource(info->src.resource);
311 struct vc4_resource *dst = vc4_resource(info->dst.resource);
325 assert(info->src.box.x == 0 && info->dst.box.x == 0);
326 assert(info->src.box.y == 0 && info->dst.box.y == 0);
327 assert(info->src.box.width == info->dst.box.width);
328 assert(info->src.box.height == info->dst.box.height);
330 if ((src->slices[info->src.level].offset & 3) ||
331 (src->slices[info->src.level].stride & 3)) {
333 src->slices[info->src.level].offset,
334 src->slices[info->src.level].stride);
343 util_blitter_default_dst_texture(&dst_tmpl, info->dst.resource,
344 info->dst.level, info->dst.box.z);
347 pctx->create_surface(pctx, info->dst.resource, &dst_tmpl);
358 uint32_t stride = src->slices[info->src.level].stride;
365 .buffer = info->src.resource,
366 .buffer_offset = src->slices[info->src.level].offset,
368 src->slices[info->src.level].offset),
396 ok = util_try_blit_via_copy_region(pctx, info, false);
403 vc4_render_blit(struct pipe_context *ctx, struct pipe_blit_info *info)
407 if (!util_blitter_is_blit_supported(vc4->blitter, info)) {
409 util_format_short_name(info->src.resource->format),
410 util_format_short_name(info->dst.resource->format));
415 if (!info->scissor_enable) {
416 info->scissor_enable = true;
417 info->scissor.minx = info->dst.box.x;
418 info->scissor.miny = info->dst.box.y;
419 info->scissor.maxx = info->dst.box.x + info->dst.box.width;
420 info->scissor.maxy = info->dst.box.y + info->dst.box.height;
424 util_blitter_blit(vc4->blitter, info);
435 struct pipe_blit_info info = *blit_info;
443 if (info.mask & PIPE_MASK_S) {
444 if (util_try_blit_via_copy_region(pctx, &info, false))
447 info.mask &= ~PIPE_MASK_S;
451 if (vc4_render_blit(pctx, &info))