Lines Matching refs:prsc
47 struct pipe_resource *prsc = &rsc->base;
49 if (prsc->target == PIPE_BUFFER) {
53 util_format_short_name(prsc->format),
54 prsc->width0, prsc->height0,
69 for (int i = 0; i <= prsc->last_level; i++) {
75 u_minify(util_next_power_of_two(prsc->depth0), i);
81 util_format_short_name(prsc->format),
82 prsc->width0, prsc->height0,
84 u_minify(prsc->width0, i),
85 u_minify(prsc->height0, i),
86 u_minify(prsc->depth0, i),
98 struct pipe_resource *prsc = &rsc->base;
99 struct pipe_screen *pscreen = prsc->screen;
174 struct pipe_resource *prsc,
178 struct v3d_resource *rsc = v3d_resource(prsc);
186 if (prsc->bind & PIPE_BIND_VERTEX_BUFFER)
188 if (prsc->bind & PIPE_BIND_CONSTANT_BUFFER)
197 if (prsc->bind & PIPE_BIND_SAMPLER_VIEW)
203 v3d_flush_jobs_reading_resource(v3d, prsc,
213 v3d_flush_jobs_reading_resource(v3d, prsc,
217 v3d_flush_jobs_writing_resource(v3d, prsc,
231 struct pipe_resource *prsc,
237 struct v3d_resource *rsc = v3d_resource(prsc);
240 enum pipe_format format = prsc->format;
244 assert(prsc->nr_samples <= 1);
251 !(prsc->flags & PIPE_RESOURCE_FLAG_MAP_PERSISTENT) &&
252 prsc->last_level == 0 &&
253 prsc->width0 == box->width &&
254 prsc->height0 == box->height &&
255 prsc->depth0 == box->depth &&
256 prsc->array_size == 1 &&
261 v3d_map_usage_prep(pctx, prsc, usage);
271 pipe_resource_reference(&ptrans->resource, prsc);
343 struct pipe_resource *prsc,
351 struct v3d_resource *rsc = v3d_resource(prsc);
356 return u_default_texture_subdata(pctx, prsc, level, usage, box,
364 v3d_map_usage_prep(pctx, prsc, usage | (PIPE_MAP_WRITE |
388 struct pipe_resource *prsc)
391 struct v3d_resource *rsc = v3d_resource(prsc);
418 struct pipe_resource *prsc,
423 struct v3d_resource *rsc = v3d_resource(prsc);
459 struct pipe_context *pctx, struct pipe_resource *prsc,
464 struct v3d_resource *rsc = v3d_resource(prsc);
531 struct pipe_resource *prsc = &rsc->base;
532 uint32_t width = prsc->width0;
533 uint32_t height = prsc->height0;
534 uint32_t depth = prsc->depth0;
548 uint32_t block_width = util_format_get_blockwidth(prsc->format);
549 uint32_t block_height = util_format_get_blockheight(prsc->format);
550 bool msaa = prsc->nr_samples > 1;
560 assert(prsc->array_size != 0);
561 assert(prsc->depth0 != 0);
563 for (int i = prsc->last_level; i >= 0; i--) {
589 if (prsc->target == PIPE_TEXTURE_1D)
676 for (int i = 0; i <= prsc->last_level; i++)
684 if (prsc->target != PIPE_TEXTURE_3D) {
687 rsc->size += rsc->cube_map_stride * (prsc->array_size - 1);
694 v3d_layer_offset(struct pipe_resource *prsc, uint32_t level, uint32_t layer)
696 struct v3d_resource *rsc = v3d_resource(prsc);
699 if (prsc->target == PIPE_TEXTURE_3D)
713 struct pipe_resource *prsc = &rsc->base;
715 *prsc = *tmpl;
717 pipe_reference_init(&prsc->reference, 1);
718 prsc->screen = pscreen;
720 if (prsc->nr_samples <= 1 ||
722 util_format_is_depth_or_stencil(prsc->format)) {
723 rsc->cpp = util_format_get_blocksize(prsc->format);
724 if (screen->devinfo.ver < 40 && prsc->nr_samples > 1)
725 rsc->cpp *= prsc->nr_samples;
727 assert(v3d_rt_format_supported(&screen->devinfo, prsc->format));
729 v3d_get_rt_format(&screen->devinfo, prsc->format);
766 struct pipe_resource *prsc = &rsc->base;
816 rsc->internal_format = prsc->format;
823 .target = prsc->target,
849 return prsc;
855 return prsc;
857 v3d_resource_destroy(pscreen, prsc);
877 struct pipe_resource *prsc = &rsc->base;
925 rsc->internal_format = prsc->format;
956 renderonly_create_gpu_import_for_resource(prsc,
968 prsc->width0, prsc->height0,
969 util_format_short_name(prsc->format),
978 return prsc;
981 v3d_resource_destroy(pscreen, prsc);
1139 v3d_resource_get_internal_format(struct pipe_resource *prsc)
1141 return v3d_resource(prsc)->internal_format;
1145 v3d_resource_set_stencil(struct pipe_resource *prsc,
1148 v3d_resource(prsc)->separate_stencil = v3d_resource(stencil);
1152 v3d_resource_get_stencil(struct pipe_resource *prsc)
1154 struct v3d_resource *rsc = v3d_resource(prsc);