Lines Matching refs:sws
116 get_float_cap(struct svga_winsys_screen *sws, SVGA3dDevCapIndex cap,
120 if (sws->get_cap(sws, cap, &result))
129 get_uint_cap(struct svga_winsys_screen *sws, SVGA3dDevCapIndex cap,
133 if (sws->get_cap(sws, cap, &result))
142 get_bool_cap(struct svga_winsys_screen *sws, SVGA3dDevCapIndex cap,
146 if (sws->get_cap(sws, cap, &result))
157 struct svga_winsys_screen *sws = svgascreen->sws;
179 return (float) get_uint_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY, 4);
202 struct svga_winsys_screen *sws = svgascreen->sws;
216 return sws->have_vgpu10 ? 1 : 0;
226 return sws->have_vgpu10;
228 return sws->have_vgpu10 ? 16 : 0;
238 if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH, &result))
242 if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT, &result))
250 if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VOLUME_EXTENT, &result))
263 return sws->have_sm5 ? SVGA3D_SM5_MAX_SURFACE_ARRAYSIZE :
264 (sws->have_vgpu10 ? SVGA3D_SM4_MAX_SURFACE_ARRAYSIZE : 0);
272 return sws->have_vgpu10;
274 return !sws->have_vgpu10;
279 return sws->have_vgpu10;
286 if (sws->have_gl43) {
288 } else if (sws->have_sm5) {
290 } else if (sws->have_vgpu10) {
311 return sws->have_vgpu10;
314 return sws->have_vgpu10 ? SVGA3D_DX_MAX_SOTARGETS : 0;
316 return sws->have_vgpu10 ? 4 : 0;
318 return sws->have_sm5 ? SVGA3D_MAX_STREAMOUT_DECLS :
319 (sws->have_vgpu10 ? SVGA3D_MAX_DX10_STREAMOUT_DECLS : 0);
321 return sws->have_sm5;
323 return sws->have_sm5;
334 return sws->have_vgpu10 ? VGPU10_MIN_TEXEL_FETCH_OFFSET : 0;
336 return sws->have_vgpu10 ? VGPU10_MAX_TEXEL_FETCH_OFFSET : 0;
343 return sws->have_vgpu10 ? 256 : 0;
345 return sws->have_vgpu10 ? 1024 : 0;
352 return sws->have_generate_mipmap_cmd;
355 return sws->have_fence_fd;
365 return sws->have_sm4_1;
370 return sws->have_sm5 ? 4 :
371 (sws->have_sm4_1 ? 1 : 0);
373 return sws->have_sm5;
375 return sws->have_sm5 ? 4 : 0;
377 return sws->have_gl43;
382 return sws->have_vgpu10 ? VGPU10_MAX_FS_INPUTS-1 : 10;
384 return sws->have_coherent;
387 return sws->have_sm5;
389 return sws->have_sm5;
392 return sws->have_gl43;
395 return sws->have_gl43;
398 return sws->have_gl43;
408 return sws->have_gl43 ? 16 : 0;
412 return sws->have_gl43 ? SVGA_MAX_SHADER_BUFFERS : 0;
415 return sws->have_gl43 ? SVGA_MAX_ATOMIC_BUFFERS : 0;
425 assert((!sws->have_vgpu10 && svgascreen->max_viewports == 1) ||
426 (sws->have_vgpu10 &&
435 if (sws->device_id) {
436 return sws->device_id;
446 return sws->have_vgpu10;
448 return sws->have_vgpu10;
450 return sws->have_sm5;
462 return sws->have_sm5 ? 30 : 0;
468 return sws->have_vgpu10 ? 1 : 0;
470 return sws->have_gl43;
483 struct svga_winsys_screen *sws = svgascreen->sws;
486 assert(!sws->have_vgpu10);
495 return get_uint_cap(sws,
512 val = get_uint_cap(sws, SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS, 32);
566 return get_uint_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS,
583 val = get_uint_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS, 32);
647 struct svga_winsys_screen *sws = svgascreen->sws;
649 assert(sws->have_vgpu10);
650 (void) sws; /* silence unused var warnings in non-debug builds */
652 if ((!sws->have_sm5) &&
656 if ((!sws->have_gl43) && (shader == PIPE_SHADER_COMPUTE))
717 return sws->have_gl43 ? PIPE_MAX_SAMPLERS : SVGA3D_DX_MAX_SAMPLERS;
721 if (sws->have_gl43)
734 return sws->have_gl43 ? SVGA_MAX_IMAGES : 0;
737 return sws->have_gl43 ? SVGA_MAX_SHADER_BUFFERS : 0;
741 return sws->have_gl43 ? SVGA_MAX_ATOMIC_BUFFERS : 0;
803 struct svga_winsys_screen *sws = svgascreen->sws;
807 if (sws->have_gl43 || sws->have_sm5)
809 else if (sws->have_vgpu10)
824 struct svga_winsys_screen *sws = svgascreen->sws;
825 if (sws->have_vgpu10) {
841 ASSERTED struct svga_winsys_screen *sws = svgascreen->sws;
844 assert(sws->have_gl43);
878 struct svga_winsys_screen *sws = svga_screen(screen)->sws;
879 sws->fence_reference(sws, ptr, fence);
889 struct svga_winsys_screen *sws = svga_screen(screen)->sws;
892 SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_FENCEFINISH);
895 retVal = sws->fence_signalled(sws, fence, 0) == 0;
901 retVal = sws->fence_finish(sws, fence, timeout, 0) == 0;
904 SVGA_STATS_TIME_POP(sws);
914 struct svga_winsys_screen *sws = svga_screen(screen)->sws;
916 return sws->fence_get_fd(sws, fence, TRUE);
1012 svgascreen->sws->host_log(svgascreen->sws, host_log);
1016 svgascreen->sws->host_log(svgascreen->sws, host_log);
1026 svgascreen->sws->host_log(svgascreen->sws, host_log);
1036 nop_host_log(struct svga_winsys_screen *sws, const char *message)
1052 svgascreen->sws->destroy(svgascreen->sws);
1062 svga_screen_create(struct svga_winsys_screen *sws)
1111 svgascreen->sws = sws;
1115 if (sws->get_hw_version) {
1116 svgascreen->hw_version = sws->get_hw_version(sws);
1128 if (sws->have_gl43) {
1130 get_uint_cap(sws, SVGA3D_DEVCAP_MAX_FORCED_SAMPLE_COUNT, 0);
1132 sws->have_gl43 = sws->have_gl43 && (svgascreen->forcedSampleCount >= 4);
1136 sws->have_gl43 =
1137 debug_get_bool_option("SVGA_GL43", sws->have_gl43);
1150 sws->have_gl43 ? "SM5+" :
1151 sws->have_sm5 ? "SM5" :
1152 sws->have_sm4_1 ? "SM4_1" :
1153 sws->have_vgpu10 ? "VGPU10" : "VGPU9");
1205 if (sws->have_vgpu10) {
1207 = get_bool_cap(sws, SVGA3D_DEVCAP_DX_PROVOKING_VERTEX, FALSE);
1213 if (sws->have_sm4_1 && debug_get_bool_option("SVGA_MSAA", TRUE)) {
1214 if (get_bool_cap(sws, SVGA3D_DEVCAP_MULTISAMPLE_2X, FALSE))
1216 if (get_bool_cap(sws, SVGA3D_DEVCAP_MULTISAMPLE_4X, FALSE))
1220 if (sws->have_sm5 && debug_get_bool_option("SVGA_MSAA", TRUE)) {
1221 if (get_bool_cap(sws, SVGA3D_DEVCAP_MULTISAMPLE_8X, FALSE))
1226 if (sws->have_gl43) {
1231 get_uint_cap(sws, SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS, 1);
1237 get_bool_cap(sws, SVGA3D_DEVCAP_LOGIC_BLENDOPS, FALSE);
1244 if (sws->have_sm4_1) {
1257 unsigned vs_ver = get_uint_cap(sws, SVGA3D_DEVCAP_VERTEX_SHADER_VERSION,
1259 unsigned fs_ver = get_uint_cap(sws, SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION,
1270 get_bool_cap(sws, SVGA3D_DEVCAP_LINE_AA, FALSE);
1273 get_float_cap(sws, SVGA3D_DEVCAP_MAX_POINT_SIZE, 1.0f);
1300 get_bool_cap(sws, SVGA3D_DEVCAP_LINE_STIPPLE, FALSE);
1303 MAX2(1.0, get_float_cap(sws, SVGA3D_DEVCAP_MAX_LINE_WIDTH, 1.0f));
1306 MAX2(1.0, get_float_cap(sws, SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH, 1.0f));
1325 svgascreen->sws->host_log = nop_host_log;
1341 return svga_screen(screen)->sws;