Lines Matching defs:sctx
324 void si_eliminate_fast_color_clear(struct si_context *sctx, struct si_texture *tex,
327 struct pipe_context *ctx = &sctx->b;
329 unsigned n = sctx->num_decompress_calls;
334 if (n != sctx->num_decompress_calls)
407 * \param sctx the current context if you have one, or sscreen->aux_context
410 bool si_texture_disable_dcc(struct si_context *sctx, struct si_texture *tex)
412 struct si_screen *sscreen = sctx->screen;
414 if (!sctx->has_graphics)
421 si_decompress_dcc(sctx, tex);
422 sctx->b.flush(&sctx->b, NULL, 0);
427 static void si_reallocate_texture_inplace(struct si_context *sctx, struct si_texture *tex,
430 struct pipe_screen *screen = sctx->b.screen;
445 if (si_choose_tiling(sctx->screen, &templ, false) != RADEON_SURF_MODE_LINEAR_ALIGNED)
461 si_resource_copy_region(&sctx->b, &new_tex->buffer.b.b,
467 si_texture_discard_cmask(sctx->screen, tex);
468 si_texture_discard_dcc(sctx->screen, tex);
473 radeon_bo_reference(sctx->screen->ws, &tex->buffer.buf, new_tex->buffer.buf);
527 p_atomic_inc(&sctx->screen->dirty_tex_counter);
662 struct si_context *sctx;
671 sctx = ctx ? (struct si_context *)ctx : si_get_aux_context(sscreen);
712 si_reallocate_texture_inplace(sctx, tex, PIPE_BIND_SHARED, false);
729 if (si_texture_disable_dcc(sctx, tex)) {
740 si_eliminate_fast_color_clear(sctx, tex, &flushed);
787 sctx->b.resource_copy_region(&sctx->b, newb, 0, 0, 0, 0, &res->b.b, 0, &box);
790 si_replace_buffer_storage(&sctx->b, &res->b.b, newb, 0, 0, 0);
816 sctx->b.flush(&sctx->b, NULL, 0);
1803 static void si_texture_invalidate_storage(struct si_context *sctx, struct si_texture *tex)
1805 struct si_screen *sscreen = sctx->screen;
1819 sctx->num_alloc_tex_transfer_bytes += tex->surface.total_size;
1826 struct si_context *sctx = (struct si_context *)ctx;
1853 if (!sctx->screen->info.has_dedicated_vram && real_level == 0 && box->width >= 4 &&
1855 bool can_invalidate = si_can_invalidate_texture(sctx->screen, tex, usage, box);
1857 si_reallocate_texture_inplace(sctx, tex, PIPE_BIND_LINEAR, can_invalidate);
1873 (tex->buffer.domains & RADEON_DOMAIN_VRAM && sctx->screen->info.has_dedicated_vram &&
1874 !sctx->screen->info.smart_access_memory))
1880 else if (si_cs_is_buffer_referenced(sctx, tex->buffer.buf, RADEON_USAGE_READWRITE) ||
1881 !sctx->ws->buffer_wait(sctx->ws, tex->buffer.buf, 0, RADEON_USAGE_READWRITE)) {
1883 if (si_can_invalidate_texture(sctx->screen, tex, usage, box))
1884 si_texture_invalidate_storage(sctx, tex);
1923 si_texture_get_offset(sctx->screen, staging, 0, NULL, &trans->b.b.stride,
1934 offset = si_texture_get_offset(sctx->screen, tex, real_level, box, &trans->b.b.stride,
1945 if (!(map = si_buffer_map(sctx, buf, usage)))
1960 struct si_context *sctx = (struct si_context *)ctx;
1971 sctx->ws->buffer_unmap(sctx->ws, buf->buf);
1978 sctx->num_alloc_tex_transfer_bytes += stransfer->staging->buf->size;
1995 if (sctx->num_alloc_tex_transfer_bytes > (uint64_t)sctx->screen->info.gart_size_kb * 1024 / 4) {
1996 si_flush_gfx_cs(sctx, RADEON_FLUSH_ASYNC_START_NEXT_GFX_IB_NOW, NULL);
1997 sctx->num_alloc_tex_transfer_bytes = 0;
2075 void vi_disable_dcc_if_incompatible_format(struct si_context *sctx, struct pipe_resource *tex,
2081 if (!si_texture_disable_dcc(sctx, stex))
2082 si_decompress_dcc(sctx, stex);
2395 void si_init_context_texture_functions(struct si_context *sctx)
2397 sctx->b.texture_map = si_texture_transfer_map;
2398 sctx->b.texture_unmap = si_texture_transfer_unmap;
2399 sctx->b.create_surface = si_create_surface;
2400 sctx->b.surface_destroy = si_surface_destroy;