Lines Matching defs:flags

182    uint64_t flags = 0;
195 flags |= RADEON_SURF_ZBUFFER;
199 flags |= RADEON_SURF_NO_HTILE;
210 flags |= RADEON_SURF_TC_COMPATIBLE_HTILE;
214 flags |= RADEON_SURF_SBUFFER;
220 if (ptex->flags & SI_RESOURCE_FLAG_DISABLE_DCC)
221 flags |= RADEON_SURF_DISABLE_DCC;
224 flags |= RADEON_SURF_DISABLE_DCC;
232 flags |= RADEON_SURF_DISABLE_DCC;
237 flags |= RADEON_SURF_DISABLE_DCC;
243 flags |= RADEON_SURF_DISABLE_DCC;
247 flags |= RADEON_SURF_DISABLE_DCC;
257 flags |= RADEON_SURF_DISABLE_DCC;
263 flags |= RADEON_SURF_DISABLE_DCC;
275 /* This should catch bugs in gallium users setting incorrect flags. */
277 ptex->last_level == 0 && !(flags & RADEON_SURF_Z_OR_SBUFFER));
279 flags |= RADEON_SURF_SCANOUT;
283 flags |= RADEON_SURF_SHAREABLE;
285 flags |= RADEON_SURF_IMPORTED | RADEON_SURF_SHAREABLE;
287 flags |= RADEON_SURF_NO_FMASK;
289 if (sscreen->info.gfx_level == GFX9 && (ptex->flags & SI_RESOURCE_FLAG_FORCE_MICRO_TILE_MODE)) {
290 flags |= RADEON_SURF_FORCE_MICRO_TILE_MODE;
291 surface->micro_tile_mode = SI_RESOURCE_FLAG_MICRO_TILE_MODE_GET(ptex->flags);
294 if (ptex->flags & SI_RESOURCE_FLAG_FORCE_MSAA_TILING) {
300 flags |= RADEON_SURF_FORCE_SWIZZLE_MODE;
306 if (ptex->flags & PIPE_RESOURCE_FLAG_SPARSE) {
307 flags |=
316 r = sscreen->ws->surface_init(sscreen->ws, ptex, flags, bpe, array_mode, surface);
479 tex->buffer.flags = new_tex->buffer.flags;
709 (tex->buffer.flags & RADEON_FLAG_NO_INTERPROCESS_SHARING &&
715 assert(res->flags & RADEON_FLAG_NO_SUBALLOC);
716 assert(!(res->flags & RADEON_FLAG_NO_INTERPROCESS_SHARING));
769 (tex->buffer.flags & RADEON_FLAG_NO_INTERPROCESS_SHARING &&
794 assert(res->flags & RADEON_FLAG_NO_SUBALLOC);
959 tex->surface.flags & RADEON_SURF_TC_COMPATIBLE_HTILE) ||
962 tex->surface.flags & RADEON_SURF_TC_COMPATIBLE_HTILE &&
968 if (tex->surface.flags & RADEON_SURF_TC_COMPATIBLE_HTILE) {
1009 tex->surface.flags & RADEON_SURF_TC_COMPATIBLE_HTILE)
1013 tex->db_compatible = surface->flags & RADEON_SURF_ZBUFFER;
1026 resource->flags = plane0->buffer.flags;
1032 } else if (!(surface->flags & RADEON_SURF_IMPORTED)) {
1033 if (base->flags & PIPE_RESOURCE_FLAG_SPARSE)
1034 resource->b.b.flags |= PIPE_RESOURCE_FLAG_UNMAPPABLE;
1036 resource->b.b.flags |= SI_RESOURCE_FLAG_GL2_BYPASS;
1051 resource->flags = sscreen->ws->buffer_get_flags(resource->buf);
1077 if (!(surface->flags & RADEON_SURF_IMPORTED) && !tex->is_depth && tex->surface.meta_offset) {
1130 if (tex->surface.display_dcc_offset && !(surface->flags & RADEON_SURF_IMPORTED)) {
1180 bool force_tiling = templ->flags & SI_RESOURCE_FLAG_FORCE_MSAA_TILING;
1182 !(templ->flags & SI_RESOURCE_FLAG_FLUSHED_DEPTH);
1189 if (templ->flags & SI_RESOURCE_FLAG_FORCE_LINEAR)
1260 bool is_flushed_depth = templ->flags & SI_RESOURCE_FLAG_FLUSHED_DEPTH ||
1261 templ->flags & SI_RESOURCE_FLAG_FORCE_LINEAR;
1270 (templ->flags & PIPE_RESOURCE_FLAG_TEXTURING_MORE_LIKELY) &&
1531 return resource->flags & SI_RESOURCE_AUX_PLANE;
1578 surface.flags & RADEON_SURF_SCANOUT, false, false);
1590 if (tex->buffer.flags & RADEON_FLAG_ENCRYPTED)
1677 tex->b.b.flags |= SI_RESOURCE_AUX_PLANE;
1739 resource.flags = texture->flags | SI_RESOURCE_FLAG_FLUSHED_DEPTH;
1757 unsigned usage, unsigned flags)
1766 res->flags = flags;
1768 if (flags & SI_RESOURCE_FLAG_FORCE_LINEAR && util_format_is_compressed(orig->format)) {
1797 return !tex->buffer.b.is_shared && !(tex->surface.flags & RADEON_SURF_IMPORTED) &&
1832 bool use_staging_texture = tex->buffer.flags & RADEON_FLAG_ENCRYPTED;
1836 assert(!(texture->flags & SI_RESOURCE_FLAG_FORCE_LINEAR));
1839 if (tex->buffer.b.b.flags & SI_RESOURCE_AUX_PLANE)
1842 if ((tex->buffer.flags & RADEON_FLAG_ENCRYPTED) && usage & PIPE_MAP_READ)
1845 if (tex->is_depth || tex->buffer.flags & RADEON_FLAG_SPARSE) {
1872 if (!tex->surface.is_linear || (tex->buffer.flags & RADEON_FLAG_ENCRYPTED) ||
1878 tex->buffer.domains & RADEON_DOMAIN_VRAM || tex->buffer.flags & RADEON_FLAG_GTT_WC;