Lines Matching refs:screen
93 if (sctx->screen->dpbb_allowed && sctx->last_cb_target_mask != cb_target_mask) {
125 sctx->screen->info.has_dcc_constant_encode));
130 if (sctx->screen->info.rbplus_allowed) {
547 si_blend_check_commutativity(sctx->screen, blend, eqRGB, srcRGB, dstRGB, 0x7 << (4 * i));
548 si_blend_check_commutativity(sctx->screen, blend, eqA, srcA, dstA, 0x8 << (4 * i));
624 if (sctx->screen->info.rbplus_allowed) {
745 if (sctx->screen->info.has_export_conflict_bug &&
761 if (sctx->screen->dpbb_allowed &&
767 if (sctx->screen->has_out_of_order_rast &&
870 !sctx->screen->options.vrs2x2) |
932 struct si_screen *sscreen = ((struct si_context *)ctx)->screen;
1155 if (sctx->screen->info.has_msaa_sample_loc_bug && sctx->framebuffer.nr_samples > 1)
1159 if (sctx->screen->use_ngg_culling)
1166 if (sctx->screen->use_ngg_culling &&
1433 if (sctx->screen->dpbb_allowed && ((old_dsa->depth_enabled != dsa->depth_enabled ||
1438 if (sctx->screen->has_out_of_order_rast &&
1524 if (sctx->screen->info.has_dedicated_vram) {
1595 if (sctx->screen->info.has_rbplus && !sctx->screen->info.rbplus_allowed)
1598 if (sctx->screen->info.has_export_conflict_bug &&
1633 unsigned mode = sctx->screen->options.vrs2x2 && G_02880C_KILL_ENABLE(db_shader_control) ?
1641 unsigned mode = sctx->screen->options.vrs2x2 && G_02880C_KILL_ENABLE(db_shader_control) ?
1819 static uint32_t si_translate_texformat(struct pipe_screen *screen, enum pipe_format format,
1823 struct si_screen *sscreen = (struct si_screen *)screen;
2091 static unsigned is_wrap_mode_legal(struct si_screen *screen, unsigned wrap)
2093 if (!screen->info.has_3d_cube_border_color_mipmap) {
2208 static bool si_is_sampler_format_supported(struct pipe_screen *screen, enum pipe_format format)
2210 struct si_screen *sscreen = (struct si_screen *)screen;
2225 return si_translate_texformat(screen, format, desc,
2229 static uint32_t si_translate_buffer_dataformat(struct pipe_screen *screen,
2235 assert(((struct si_screen *)screen)->info.gfx_level <= GFX9);
2305 static uint32_t si_translate_buffer_numformat(struct pipe_screen *screen,
2309 assert(((struct si_screen *)screen)->info.gfx_level <= GFX9);
2340 static unsigned si_is_vertex_format_supported(struct pipe_screen *screen, enum pipe_format format,
2343 struct si_screen *sscreen = (struct si_screen *)screen;
2377 data_format = si_translate_buffer_dataformat(screen, desc, first_non_void);
2396 static bool si_is_format_supported(struct pipe_screen *screen, enum pipe_format format,
2400 struct si_screen *sscreen = (struct si_screen *)screen;
2425 if (!screen->get_param(screen, PIPE_CAP_TEXTURE_MULTISAMPLE))
2457 screen, format, usage & (PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_SHADER_IMAGE));
2459 if (si_is_sampler_format_supported(screen, format))
2478 retval |= si_is_vertex_format_supported(screen, format, PIPE_BIND_VERTEX_BUFFER);
2626 if (!sctx->screen->info.has_dedicated_vram)
2774 struct radeon_info *info = &sctx->screen->info;
3127 if (sctx->screen->use_ngg_culling)
3130 if (sctx->screen->dpbb_allowed)
3136 if (sctx->screen->has_out_of_order_rast &&
3489 if (sctx->screen->info.has_two_planes_iterate256_bug && iterate256 &&
3607 if (sctx->screen->dpbb_allowed) {
3624 bool has_msaa_sample_loc_bug = sctx->screen->info.has_msaa_sample_loc_bug;
3685 if (!sctx->screen->has_out_of_order_rast)
3740 unsigned num_tile_pipes = sctx->screen->info.num_tile_pipes;
3869 if (sctx->screen->dpbb_allowed)
3900 void si_make_buffer_descriptor(struct si_screen *screen, struct si_resource *buf,
3937 if (screen->info.gfx_level == GFX8)
3948 if (screen->info.gfx_level >= GFX10) {
3949 const struct gfx10_format *fmt = &ac_get_gfx10_format_table(&screen->info)[format];
3960 S_008F0C_RESOURCE_LEVEL(screen->info.gfx_level < GFX11);
3966 num_format = si_translate_buffer_numformat(&screen->b, desc, first_non_void);
3967 data_format = si_translate_buffer_dataformat(&screen->b, desc, first_non_void);
4006 struct si_screen *screen, struct si_texture *tex, bool sampler, enum pipe_texture_target target,
4019 img_format = ac_get_gfx10_format_table(&screen->info)[pipe_format].img_format;
4049 if (screen->info.gfx_level >= GFX11) {
4067 type = si_tex_dim(screen, tex, target, res->nr_samples);
4082 S_00A008_RESOURCE_LEVEL(screen->info.gfx_level < GFX11);
4104 if (screen->info.gfx_level >= GFX11) {
4115 S_00A018_ALPHA_IS_ON_MSB(vi_alpha_is_on_msb(screen, pipe_format));
4178 S_00A00C_TYPE(si_tex_dim(screen, tex, target, 0));
4189 static void si_make_texture_descriptor(struct si_screen *screen, struct si_texture *tex,
4226 if (screen->info.gfx_level <= GFX8)
4306 data_format = si_translate_texformat(&screen->b, pipe_format, desc, first_non_void);
4312 if (screen->info.gfx_level == GFX9 && pipe_format == PIPE_FORMAT_S8_UINT)
4316 (screen->info.gfx_level <= GFX8 && res->target == PIPE_TEXTURE_3D))) {
4326 type = si_tex_dim(screen, tex, target, num_samples);
4353 if (screen->info.gfx_level == GFX9) {
4374 state[6] = S_008F28_ALPHA_IS_ON_MSB(vi_alpha_is_on_msb(screen, pipe_format));
4379 if (screen->info.gfx_level <= GFX7 && res->nr_samples <= 1) {
4394 if (screen->info.gfx_level == GFX9) {
4494 S_008F1C_TYPE(si_tex_dim(screen, tex, target, 0));
4500 if (screen->info.gfx_level == GFX9) {
4552 uint32_t elements = si_clamp_texture_texel_count(sctx->screen->max_texel_buffer_elements,
4555 si_make_buffer_descriptor(sctx->screen, si_resource(texture), state->format,
4622 sctx->screen->make_texture_descriptor(
4623 sctx->screen, tex, true, state->target, pipe_format, state_swizzle,
4702 return (sctx->screen->info.gfx_level >= GFX11 ? S_008F3C_BORDER_COLOR_PTR_GFX11(i):
4739 struct si_screen *sscreen = sctx->screen;
4874 struct si_screen *sscreen = (struct si_screen *)ctx->screen;
5063 data_format = si_translate_buffer_dataformat(ctx->screen, desc, first_non_void);
5064 num_format = si_translate_buffer_numformat(ctx->screen, desc, first_non_void);
5224 si_create_vertex_state(struct pipe_screen *screen,
5231 struct si_screen *sscreen = (struct si_screen *)screen;
5234 util_init_pipe_vertex_state(screen, buffer, elements, num_elements, indexbuf, full_velem_mask,
5241 ctx.b.screen = screen;
5265 static void si_vertex_state_destroy(struct pipe_screen *screen,
5274 si_pipe_create_vertex_state(struct pipe_screen *screen,
5281 struct si_screen *sscreen = (struct si_screen *)screen;
5283 return util_vertex_state_cache_get(screen, buffer, elements, num_elements, indexbuf,
5287 static void si_pipe_vertex_state_destroy(struct pipe_screen *screen,
5290 struct si_screen *sscreen = (struct si_screen *)screen;
5292 util_vertex_state_destroy(screen, &sscreen->vertex_state_cache, state);
5362 sctx->screen->info.tcc_rb_non_coherent)
5370 if (sctx->screen->info.gfx_level <= GFX7)
5385 if (sctx->screen->info.gfx_level <= GFX8 && flags & PIPE_BARRIER_INDIRECT_BUFFER)
5493 assert(se == ~0 || se < sctx->screen->info.max_se);
5503 unsigned num_se = MAX2(sctx->screen->info.max_se, 1);
5507 ac_get_harvested_configs(&sctx->screen->info, raster_config, &raster_config_1, raster_config_se);
5522 struct si_screen *sscreen = sctx->screen;
5554 struct si_screen *sscreen = sctx->screen;