Lines Matching defs:nir
27 #include "nir.h"
30 #include "nir/nir_helpers.h"
1425 static bool si_nir_kill_outputs(nir_shader *nir, const union si_shader_key *key)
1427 nir_function_impl *impl = nir_shader_get_entrypoint(nir);
1430 if (nir->info.stage > MESA_SHADER_GEOMETRY ||
1515 static bool si_lower_io_to_mem(struct si_shader *shader, nir_shader *nir,
1521 if (nir->info.stage == MESA_SHADER_VERTEX) {
1523 NIR_PASS_V(nir, ac_nir_lower_ls_outputs_to_mem, si_map_io_driver_location,
1527 NIR_PASS_V(nir, ac_nir_lower_es_outputs_to_mem, si_map_io_driver_location,
1531 } else if (nir->info.stage == MESA_SHADER_TESS_CTRL) {
1532 NIR_PASS_V(nir, ac_nir_lower_hs_inputs_to_mem, si_map_io_driver_location,
1534 NIR_PASS_V(nir, ac_nir_lower_hs_outputs_to_mem, si_map_io_driver_location,
1546 } else if (nir->info.stage == MESA_SHADER_TESS_EVAL) {
1547 NIR_PASS_V(nir, ac_nir_lower_tes_inputs_to_mem, si_map_io_driver_location);
1550 NIR_PASS_V(nir, ac_nir_lower_es_outputs_to_mem, si_map_io_driver_location,
1555 } else if (nir->info.stage == MESA_SHADER_GEOMETRY) {
1556 NIR_PASS_V(nir, ac_nir_lower_gs_inputs_to_mem, si_map_io_driver_location,
1581 nir_shader *nir;
1584 if (sel->nir) {
1585 nir = sel->nir;
1587 nir = si_deserialize_shader(sel);
1596 if (unlikely(should_print_nir(nir))) {
1598 original_name = ralloc_strdup(nir, nir->info.name);
1599 ralloc_asprintf_append((char **)&nir->info.name, "-%08x", _mesa_hash_data(key, sizeof(*key)));
1603 nir_print_shader(nir, stdout);
1608 NIR_PASS(progress, nir, si_nir_kill_outputs, key);
1656 NIR_PASS_V(nir, nir_inline_uniforms,
1657 nir->info.num_inlinable_uniforms,
1659 nir->info.inlinable_uniform_dw_offsets);
1664 NIR_PASS(progress, nir, nir_lower_poly_line_smooth, SI_NUM_SMOOTH_AA_SAMPLES);
1667 NIR_PASS(progress, nir, nir_lower_point_smooth);
1670 si_nir_opts(sel->screen, nir, true);
1682 NIR_PASS_V(nir, nir_remove_dead_variables, nir_var_function_temp, NULL);
1683 NIR_PASS(progress2, nir, nir_opt_large_constants, glsl_get_natural_size_align_bytes, 16);
1688 progress2 |= ac_nir_lower_indirect_derefs(nir, sel->screen->info.gfx_level);
1690 bool opt_offsets = si_lower_io_to_mem(shader, nir, tcs_vgpr_only_inputs);
1693 si_nir_opts(sel->screen, nir, false);
1701 NIR_PASS_V(nir, nir_opt_offsets, &offset_options);
1705 si_nir_late_opts(nir);
1707 NIR_PASS_V(nir, nir_divergence_analysis);
1712 NIR_PASS_V(nir, nir_group_loads, nir_group_same_resource_only, 200);
1715 ralloc_free((void*)nir->info.name);
1716 nir->info.name = original_name;
1719 return nir;
1722 void si_update_shader_binary_info(struct si_shader *shader, nir_shader *nir)
1725 si_nir_scan_shader(shader->selector->screen, nir, &info);
1731 static void si_nir_assign_param_offsets(nir_shader *nir, const struct si_shader_info *info,
1736 nir_function_impl *impl = nir_shader_get_entrypoint(nir);
1782 struct nir_shader *nir = si_get_nir_shader(shader, &free_nir, 0);
1805 NIR_PASS_V(nir, ac_nir_optimize_outputs, false, slot_remap,
1810 si_nir_assign_param_offsets(nir, &sel->info, slot_remap, &shader->info.nr_param_exports,
1822 nir_gather_stream_output_info(nir, &so);
1828 nir_print_shader(nir, stderr);
1837 si_update_shader_binary_info(shader, nir);
1840 shader->info.private_mem_vgprs = DIV_ROUND_UP(nir->scratch_size, 4);
1853 if (!(nir->info.float_controls_execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) &&
1854 nir->info.float_controls_execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32)
1857 if (!(nir->info.float_controls_execution_mode & (FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16 |
1859 nir->info.float_controls_execution_mode & (FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16 |
1863 if (!(nir->info.float_controls_execution_mode & (FLOAT_CONTROLS_DENORM_PRESERVE_FP16 |
1865 nir->info.float_controls_execution_mode & (FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16 |
1873 if (!si_llvm_compile_shader(sscreen, compiler, shader, &so, debug, nir, free_nir))