Lines Matching defs:ctx
901 struct si_context *ctx;
930 typedef void (*pipe_draw_vertex_state_func)(struct pipe_context *ctx,
944 struct radeon_winsys_ctx *ctx;
961 void (*emit_cache_flush)(struct si_context *ctx, struct radeon_cmdbuf *cs);
1329 void si_decompress_subresource(struct pipe_context *ctx, struct pipe_resource *tex, unsigned planes,
1332 void si_resource_copy_region(struct pipe_context *ctx, struct pipe_resource *dst,
1338 bool si_msaa_resolve_blit_via_CB(struct pipe_context *ctx, const struct pipe_blit_info *info);
1339 void si_gfx_blit(struct pipe_context *ctx, const struct pipe_blit_info *info);
1360 void si_replace_buffer_storage(struct pipe_context *ctx, struct pipe_resource *dst,
1431 void si_compute_clear_render_target(struct pipe_context *ctx, struct pipe_surface *dstsurf,
1438 void si_compute_expand_fmask(struct pipe_context *ctx, struct pipe_resource *tex);
1477 void si_cp_release_mem(struct si_context *ctx, struct radeon_cmdbuf *cs, unsigned event,
1482 void si_cp_wait_mem(struct si_context *ctx, struct radeon_cmdbuf *cs, uint64_t va, uint32_t ref,
1484 void si_init_fence_functions(struct si_context *ctx);
1486 struct pipe_fence_handle *si_create_fence(struct pipe_context *ctx,
1492 bool si_sdma_copy_image(struct si_context *ctx, struct si_texture *dst, struct si_texture *src);
1495 void si_flush_gfx_cs(struct si_context *ctx, unsigned flags, struct pipe_fence_handle **fence);
1496 void si_allocate_gds(struct si_context *ctx);
1497 void si_set_tracked_regs_to_clear_state(struct si_context *ctx);
1498 void si_begin_new_gfx_cs(struct si_context *ctx, bool first_cs);
1553 void *si_create_dma_compute_shader(struct pipe_context *ctx, unsigned num_dwords_per_thread,
1556 void *si_clear_render_target_shader(struct pipe_context *ctx);
1557 void *si_clear_render_target_shader_1d_array(struct pipe_context *ctx);
1558 void *si_clear_12bytes_buffer_shader(struct pipe_context *ctx);
1559 void *si_create_fmask_expand_cs(struct pipe_context *ctx, unsigned num_samples, bool is_array);
1586 void si_update_vs_viewport_state(struct si_context *ctx);
1587 void si_init_viewport_functions(struct si_context *ctx);
1593 bool si_init_flushed_depth_texture(struct pipe_context *ctx, struct pipe_resource *texture);
1598 bool si_texture_commit(struct si_context *ctx, struct si_resource *res, unsigned level,
1942 static inline void si_need_gfx_cs_space(struct si_context *ctx, unsigned num_draws)
1944 struct radeon_cmdbuf *cs = &ctx->gfx_cs;
1950 uint32_t kb = ctx->memory_usage_kb;
1951 ctx->memory_usage_kb = 0;
1953 if (radeon_cs_memory_below_limit(ctx->screen, &ctx->gfx_cs, kb) &&
1954 ctx->ws->cs_check_space(cs, si_get_minimum_num_gfx_cs_dwords(ctx, num_draws)))
1957 si_flush_gfx_cs(ctx, RADEON_FLUSH_ASYNC_START_NEXT_GFX_IB_NOW, NULL);