Lines Matching defs:sctx
61 static void si_pc_emit_instance(struct si_context *sctx, int se, int instance)
63 struct radeon_cmdbuf *cs = &sctx->gfx_cs;
72 if (sctx->gfx_level >= GFX10) {
97 static void si_pc_emit_select(struct si_context *sctx, struct ac_pc_block *block, unsigned count,
101 struct radeon_cmdbuf *cs = &sctx->gfx_cs;
125 static void si_pc_emit_start(struct si_context *sctx, struct si_resource *buffer, uint64_t va)
127 struct radeon_cmdbuf *cs = &sctx->gfx_cs;
129 si_cp_copy_data(sctx, &sctx->gfx_cs, COPY_DATA_DST_MEM, buffer, va - buffer->gpu_address,
144 static void si_pc_emit_stop(struct si_context *sctx, struct si_resource *buffer, uint64_t va)
146 struct radeon_cmdbuf *cs = &sctx->gfx_cs;
148 si_cp_release_mem(sctx, cs, V_028A90_BOTTOM_OF_PIPE_TS, 0, EOP_DST_SEL_MEM, EOP_INT_SEL_NONE,
150 si_cp_wait_mem(sctx, cs, va, 0, 0xffffffff, WAIT_REG_MEM_EQUAL);
156 if (!sctx->screen->info.never_send_perfcounter_stop) {
163 S_036020_PERFMON_STATE(sctx->screen->info.never_stop_sq_perf_counters ?
219 static void si_pc_emit_read(struct si_context *sctx, struct ac_pc_block *block, unsigned count,
223 struct radeon_cmdbuf *cs = &sctx->gfx_cs;
261 static void si_pc_query_destroy(struct si_context *sctx, struct si_query *squery)
273 si_query_buffer_destroy(sctx->screen, &query->buffer);
277 void si_inhibit_clockgating(struct si_context *sctx, struct radeon_cmdbuf *cs, bool inhibit)
279 if (sctx->gfx_level >= GFX11)
282 radeon_begin(&sctx->gfx_cs);
284 if (sctx->gfx_level >= GFX10) {
287 } else if (sctx->gfx_level >= GFX8) {
294 static void si_pc_query_resume(struct si_context *sctx, struct si_query *squery)
303 if (!si_query_buffer_alloc(sctx, &query->buffer, NULL, query->result_size))
305 si_need_gfx_cs_space(sctx, 0);
308 si_pc_emit_shaders(&sctx->gfx_cs, query->shaders);
310 si_inhibit_clockgating(sctx, &sctx->gfx_cs, true);
318 si_pc_emit_instance(sctx, group->se, group->instance);
321 si_pc_emit_select(sctx, block, group->num_counters, group->selectors);
325 si_pc_emit_instance(sctx, -1, -1);
328 si_pc_emit_start(sctx, query->buffer.buf, va);
331 static void si_pc_query_suspend(struct si_context *sctx, struct si_query *squery)
341 si_pc_emit_stop(sctx, query->buffer.buf, va);
349 se_end = sctx->screen->info.max_se;
355 si_pc_emit_instance(sctx, se, instance);
356 si_pc_emit_read(sctx, block, group->num_counters, va);
362 si_pc_emit_instance(sctx, -1, -1);
364 si_inhibit_clockgating(sctx, &sctx->gfx_cs, false);
409 static bool si_pc_query_get_result(struct si_context *sctx, struct si_query *squery, bool wait,
422 map = sctx->ws->buffer_map(sctx->ws, qbuf->buf->buf, NULL, usage);
424 map = si_buffer_map(sctx, qbuf->buf, usage);
728 si_spm_init_bo(struct si_context *sctx)
730 struct radeon_winsys *ws = sctx->ws;
733 sctx->spm_trace.buffer_size = size;
734 sctx->spm_trace.sample_interval = 4096; /* Default to 4096 clk. */
736 sctx->spm_trace.bo = ws->buffer_create(
743 return sctx->spm_trace.bo != NULL;
748 si_emit_spm_counters(struct si_context *sctx, struct radeon_cmdbuf *cs)
750 struct ac_spm_trace_data *spm_trace = &sctx->spm_trace;
794 si_emit_spm_setup(struct si_context *sctx, struct radeon_cmdbuf *cs)
796 struct ac_spm_trace_data *spm_trace = &sctx->spm_trace;
797 uint64_t va = sctx->screen->ws->buffer_get_virtual_address(spm_trace->bo);
876 si_emit_spm_counters(sctx, cs);
880 si_spm_init(struct si_context *sctx)
882 const struct radeon_info *info = &sctx->screen->info;
884 sctx->screen->perfcounters = CALLOC_STRUCT(si_perfcounters);
885 sctx->screen->perfcounters->num_stop_cs_dwords = 14 + si_cp_write_fence_dwords(sctx->screen);
886 sctx->screen->perfcounters->num_instance_cs_dwords = 3;
888 struct ac_perfcounters *pc = &sctx->screen->perfcounters->base;
917 if (!ac_init_spm(info, pc, ARRAY_SIZE(spm_counters), spm_counters, &sctx->spm_trace))
920 if (!si_spm_init_bo(sctx))
927 si_spm_finish(struct si_context *sctx)
929 struct pb_buffer *bo = sctx->spm_trace.bo;
930 radeon_bo_reference(sctx->screen->ws, &bo, NULL);
932 ac_destroy_spm(&sctx->spm_trace);