Lines Matching refs:ctx

47       struct si_context *ctx;
67 void si_cp_release_mem(struct si_context *ctx, struct radeon_cmdbuf *cs, unsigned event,
76    bool compute_ib = !ctx->has_graphics;
80    if (ctx->gfx_level >= GFX9 || (compute_ib && ctx->gfx_level >= GFX7)) {
88       if (ctx->gfx_level == GFX9 && !compute_ib && query_type != PIPE_QUERY_OCCLUSION_COUNTER &&
91          struct si_screen *sscreen = ctx->screen;
94          if (!ctx->ws->cs_is_secure(&ctx->gfx_cs)) {
95             scratch = ctx->eop_bug_scratch;
97             assert(ctx->screen->info.has_tmz_support);
98             if (!ctx->eop_bug_scratch_tmz)
99                ctx->eop_bug_scratch_tmz =
107             scratch = ctx->eop_bug_scratch_tmz;
110          assert(16 * ctx->screen->info.max_render_backends <= scratch->b.b.width0);
116          radeon_add_to_buffer_list(ctx, &ctx->gfx_cs, scratch,
120       radeon_emit(PKT3(PKT3_RELEASE_MEM, ctx->gfx_level >= GFX9 ? 6 : 5, 0));
127       if (ctx->gfx_level >= GFX9)
130       if (ctx->gfx_level == GFX7 || ctx->gfx_level == GFX8) {
131          struct si_resource *scratch = ctx->eop_bug_scratch;
145          radeon_add_to_buffer_list(ctx, &ctx->gfx_cs, scratch,
160       radeon_add_to_buffer_list(ctx, &ctx->gfx_cs, buf, RADEON_USAGE_WRITE | RADEON_PRIO_QUERY);
174 void si_cp_wait_mem(struct si_context *ctx, struct radeon_cmdbuf *cs, uint64_t va, uint32_t ref,
228 struct pipe_fence_handle *si_create_fence(struct pipe_context *ctx,
252 static void si_fine_fence_set(struct si_context *ctx, struct si_fine_fence *fine, unsigned flags)
259    u_upload_alloc(ctx->cached_gtt_allocator, 0, 4, 4, &fine->offset,
269       si_cp_write_data(ctx, fine->buf, fine->offset, 4, V_370_MEM, V_370_PFP, &value);
273       radeon_add_to_buffer_list(ctx, &ctx->gfx_cs, fine->buf, RADEON_USAGE_WRITE | RADEON_PRIO_QUERY);
274       si_cp_release_mem(ctx, &ctx->gfx_cs, V_028A90_BOTTOM_OF_PIPE_TS, 0, EOP_DST_SEL_MEM,
282 static bool si_fence_finish(struct pipe_screen *screen, struct pipe_context *ctx,
290    ctx = threaded_context_unwrap_sync(ctx);
291    sctx = (struct si_context *)(ctx ? ctx : NULL);
303          threaded_context_flush(ctx, sfence->tc_token, timeout == 0);
332    if (sctx && sfence->gfx_unflushed.ctx == sctx &&
358       sfence->gfx_unflushed.ctx = NULL;
381 static void si_create_fence_fd(struct pipe_context *ctx, struct pipe_fence_handle **pfence, int fd,
384    struct si_screen *sscreen = (struct si_screen *)ctx->screen;
435    assert(!sfence->gfx_unflushed.ctx);
436    if (sfence->gfx_unflushed.ctx)
454 static void si_flush_all_queues(struct pipe_context *ctx,
458    struct pipe_screen *screen = ctx->screen;
459    struct si_context *sctx = (struct si_context *)ctx;
528          new_fence->gfx_unflushed.ctx = sctx;
547 static void si_flush_from_st(struct pipe_context *ctx, struct pipe_fence_handle **fence,
550    return si_flush_all_queues(ctx, fence, flags, false);
553 static void si_fence_server_signal(struct pipe_context *ctx, struct pipe_fence_handle *fence)
555    struct si_context *sctx = (struct si_context *)ctx;
578    si_flush_all_queues(ctx, NULL, 0, true);
581 static void si_fence_server_sync(struct pipe_context *ctx, struct pipe_fence_handle *fence)
583    struct si_context *sctx = (struct si_context *)ctx;
589    if (sfence->gfx_unflushed.ctx && sfence->gfx_unflushed.ctx == sctx)
606 void si_init_fence_functions(struct si_context *ctx)
608    ctx->b.flush = si_flush_from_st;
609    ctx->b.create_fence_fd = si_create_fence_fd;
610    ctx->b.fence_server_sync = si_fence_server_sync;
611    ctx->b.fence_server_signal = si_fence_server_signal;