Lines Matching refs:chunk
131 * current context in the chunk.
143 struct si_log_chunk_shader *chunk = data;
144 si_shader_selector_reference(chunk->ctx, &chunk->sel, NULL);
145 si_compute_reference(&chunk->program, NULL);
146 FREE(chunk);
151 struct si_log_chunk_shader *chunk = data;
152 struct si_screen *sscreen = chunk->ctx->screen;
153 si_dump_shader(sscreen, chunk->shader, f);
169 struct si_log_chunk_shader *chunk = CALLOC_STRUCT(si_log_chunk_shader);
170 chunk->ctx = ctx;
171 chunk->shader = current;
172 si_shader_selector_reference(ctx, &chunk->sel, current->selector);
173 u_log_chunk(log, &si_log_chunk_type_shader, chunk);
183 struct si_log_chunk_shader *chunk = CALLOC_STRUCT(si_log_chunk_shader);
184 chunk->ctx = ctx;
185 chunk->shader = &state->program->shader;
186 si_compute_reference(&chunk->program, state->program);
187 u_log_chunk(log, &si_log_chunk_type_shader, chunk);
348 struct si_log_chunk_cs *chunk = data;
349 si_saved_cs_reference(&chunk->cs, NULL);
350 free(chunk);
364 struct radeon_cmdbuf_chunk *chunk = &cs->prev[prev_idx];
366 if (begin < chunk->cdw) {
367 ac_parse_ib_chunk(f, chunk->buf + begin, MIN2(end, chunk->cdw) - begin, last_trace_id,
371 if (end <= chunk->cdw)
374 if (begin < chunk->cdw)
377 begin -= MIN2(begin, chunk->cdw);
378 end -= chunk->cdw;
397 struct si_log_chunk_cs *chunk = data;
398 struct si_context *ctx = chunk->ctx;
399 struct si_saved_cs *scs = chunk->cs;
411 if (chunk->gfx_end != chunk->gfx_begin) {
412 if (chunk->gfx_begin == 0) {
419 ac_parse_ib(f, scs->gfx.ib + chunk->gfx_begin, chunk->gfx_end - chunk->gfx_begin,
422 si_parse_current_ib(f, &ctx->gfx_cs, chunk->gfx_begin, chunk->gfx_end, &last_trace_id,
427 if (chunk->dump_bo_list) {
450 struct si_log_chunk_cs *chunk = calloc(1, sizeof(*chunk));
452 chunk->ctx = ctx;
453 si_saved_cs_reference(&chunk->cs, scs);
454 chunk->dump_bo_list = dump_bo_list;
456 chunk->gfx_begin = scs->gfx_last_dw;
457 chunk->gfx_end = gfx_cur;
460 u_log_chunk(log, &si_log_chunk_type_cs, chunk);
626 struct si_log_chunk_desc_list *chunk = data;
627 si_resource_reference(&chunk->buf, NULL);
628 FREE(chunk);
633 struct si_log_chunk_desc_list *chunk = data;
635 chunk->gfx_level >= GFX10 ? R_00A000_SQ_IMG_RSRC_WORD0 : R_008F10_SQ_IMG_RSRC_WORD0;
637 for (unsigned i = 0; i < chunk->num_elements; i++) {
638 unsigned cpu_dw_offset = i * chunk->element_dw_size;
639 unsigned gpu_dw_offset = chunk->slot_remap(i) * chunk->element_dw_size;
640 const char *list_note = chunk->gpu_list ? "GPU list" : "CPU list";
641 uint32_t *cpu_list = chunk->list + cpu_dw_offset;
642 uint32_t *gpu_list = chunk->gpu_list ? chunk->gpu_list + gpu_dw_offset : cpu_list;
644 fprintf(f, COLOR_GREEN "%s%s slot %u (%s):" COLOR_RESET "\n", chunk->shader_name,
645 chunk->elem_name, i, list_note);
647 switch (chunk->element_dw_size) {
650 ac_dump_reg(f, chunk->gfx_level, R_008F00_SQ_BUF_RSRC_WORD0 + j * 4, gpu_list[j],
655 ac_dump_reg(f, chunk->gfx_level, sq_img_rsrc_word0 + j * 4, gpu_list[j], 0xffffffff);
659 ac_dump_reg(f, chunk->gfx_level, R_008F00_SQ_BUF_RSRC_WORD0 + j * 4, gpu_list[4 + j],
664 ac_dump_reg(f, chunk->gfx_level, sq_img_rsrc_word0 + j * 4, gpu_list[j], 0xffffffff);
668 ac_dump_reg(f, chunk->gfx_level, R_008F00_SQ_BUF_RSRC_WORD0 + j * 4, gpu_list[4 + j],
673 ac_dump_reg(f, chunk->gfx_level, sq_img_rsrc_word0 + j * 4, gpu_list[8 + j],
678 ac_dump_reg(f, chunk->gfx_level, R_008F30_SQ_IMG_SAMP_WORD0 + j * 4, gpu_list[12 + j],
683 if (memcmp(gpu_list, cpu_list, chunk->element_dw_size * 4) != 0) {
721 struct si_log_chunk_desc_list *chunk =
723 chunk->shader_name = shader_name;
724 chunk->elem_name = elem_name;
725 chunk->element_dw_size = element_dw_size;
726 chunk->num_elements = num_elements;
727 chunk->slot_remap = slot_remap;
728 chunk->gfx_level = screen->info.gfx_level;
730 si_resource_reference(&chunk->buf, desc->buffer);
731 chunk->gpu_list = desc->gpu_list;
734 memcpy(&chunk->list[i * element_dw_size], &desc->list[slot_remap(i) * element_dw_size],
738 u_log_chunk(log, &si_log_chunk_type_descriptor_list, chunk);