Lines Matching refs:temp
420 /* flag for each tgsi temp array if its been spilled or not */
457 unsigned tess_input_info; /* temp with tess input offsets */
458 unsigned tess_output_info; /* temp with tess input offsets */
459 unsigned thread_id_gpr; /* temp with thread id calculated for images */
924 /* MUL temp.x, patch_stride (input_vals.x), rel_patch_id (r0.y (tcs)) */
1020 /* Take spilled temp arrays into account when translating tgsi register
1055 /* look up spill area base offset and array size for a spilled temp array */
2224 /* the base address is now in temp.x */
2250 /* the base address is now in temp.x */
2271 /* the base address is now in temp.x */
2369 /* need to move any immediate into a temp - for trig functions which use literal for PI stuff */
3129 /* the base address is now in temp.x */
4625 /* move result from temp to dst */
4713 /* use temp register if trans_only and more than one dst component */
4760 /* move result from temp to dst */
5043 /* do a 64->32 into a temp register */
5857 /* Use additional temp if dst register and src register are the same */
7743 * muladd has no writemask, have to use another temp
7854 /* have to multiply original layer by 8 and add to face id (temp.w) in Z */
8271 unsigned temp = r600_get_temp(ctx);
8274 /* temp.w = ldfptr() */
8283 tex.dst_gpr = temp;
8299 /* temp.x = sample_index*4 */
8306 alu.dst.sel = temp;
8313 /* sample_index = temp.w >> temp.x */
8316 alu.src[0].sel = temp;
8318 alu.src[1].sel = temp;
10859 /* temp.xy = f32_to_f16(src) */
10876 /* dst.x = temp.y * 0x10000 + temp.x */
10907 /* temp.x = src.x */
10919 /* temp.y = src.x >> 16 */
10933 /* dst.wz = dst.xy = f16_to_f32(temp.xy) */
11260 /* temp.x = mul_lo a.x, b.x */
11272 /* temp.y = mul_hi a.x, b.x */
11284 /* temp.z = mul a.x, b.y */
11296 /* temp.w = mul a.y, b.x */
11308 /* temp.z = temp.z + temp.w */
11323 /* temp.y = temp.y + temp.z */
11338 /* dst.x = temp.x */
11348 /* dst.y = temp.y */