Lines Matching refs:spilled
420 /* flag for each tgsi temp array if its been spilled or not */
992 bool *spilled = ctx->spilled_arrays; // assumed calloc:ed
1002 if (!spilled[i] && size > largest) {
1008 spilled[largest_index] = true;
1020 /* Take spilled temp arrays into account when translating tgsi register
1021 * indexes into r600 gprs if spilled is false, or scratch array offset if
1022 * spilled is true */
1023 static int map_tgsi_reg_index_to_r600_gpr(struct r600_shader_ctx *ctx, unsigned tgsi_reg_index, bool *spilled)
1031 /* vec4 index into spilled scratch memory */
1032 *spilled = true;
1037 *spilled = false;
1049 /* regular GPR index, minus the holes from spilled arrays */
1050 *spilled = false;
1055 /* look up spill area base offset and array size for a spilled temp array */
1176 bool spilled;
1179 &spilled);
1181 if (!spilled) {
1624 bool spilled;
1627 idx = map_tgsi_reg_index_to_r600_gpr(ctx, tgsi_src->Register.Index, &spilled);
1629 if (spilled) {
4431 bool spilled;
4434 idx = map_tgsi_reg_index_to_r600_gpr(ctx, tgsi_dst->Register.Index, &spilled);
4436 if (spilled) {
4446 /* If no component has spilled, reserve a register and add the spill code