Lines Matching defs:output
122 unsigned mask = ((1 << so->output[i].num_components) - 1) <<
123 so->output[i].start_component;
126 so->output[i].stream,
127 so->output[i].output_buffer,
128 so->output[i].dst_offset, so->output[i].dst_offset + so->output[i].num_components - 1,
129 so->output[i].register_index,
134 so->output[i].dst_offset < so->output[i].start_component ? " (will lower)" : "");
953 ctx->shader->output[i].name = TGSI_SEMANTIC_PRIMID;
954 ctx->shader->output[i].sid = 0;
955 ctx->shader->output[i].gpr = 0;
956 ctx->shader->output[i].interpolate = TGSI_INTERPOLATE_CONSTANT;
957 ctx->shader->output[i].write_mask = 0x4;
958 ctx->shader->output[i].spi_sid = prim_id_sid;
1131 assert(i < ARRAY_SIZE(ctx->shader->output));
1132 ctx->shader->output[i].name = d->Semantic.Name;
1133 ctx->shader->output[i].sid = d->Semantic.Index + j;
1134 ctx->shader->output[i].gpr = ctx->file_offset[TGSI_FILE_OUTPUT] + d->Range.First + j;
1135 ctx->shader->output[i].interpolate = d->Interp.Interpolate;
1136 ctx->shader->output[i].write_mask = d->Declaration.UsageMask;
1140 ctx->shader->output[i].spi_sid = r600_spi_sid(&ctx->shader->output[i]);
2435 if (so->output[i].output_buffer >= 4) {
2436 R600_ERR("Exceeded the max number of stream output buffers, got: %d\n",
2437 so->output[i].output_buffer);
2446 so_gpr[i] = ctx->shader->output[so->output[i].register_index].gpr;
2447 start_comp[i] = so->output[i].start_component;
2450 * We can only output 4D vectors with a write mask, e.g. we can
2451 * only output the W component at offset 3, etc. If we want
2453 * to move it to X and output X. */
2454 if (so->output[i].dst_offset < so->output[i].start_component) {
2457 for (j = 0; j < so->output[i].num_components; j++) {
2462 alu.src[0].chan = so->output[i].start_component + j;
2467 if (j == so->output[i].num_components - 1)
2480 struct r600_bytecode_output output;
2482 if (stream != -1 && stream != so->output[i].stream)
2485 memset(&output, 0, sizeof(struct r600_bytecode_output));
2486 output.gpr = so_gpr[i];
2487 output.elem_size = so->output[i].num_components - 1;
2488 if (output.elem_size == 2)
2489 output.elem_size = 3; // 3 not supported, write 4 with junk at end
2490 output.array_base = so->output[i].dst_offset - start_comp[i];
2491 output.type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_WRITE;
2492 output.burst_count = 1;
2495 output.array_size = 0xFFF;
2496 output.comp_mask = ((1 << so->output[i].num_components) - 1) << start_comp[i];
2499 switch (so->output[i].output_buffer) {
2501 output.op = CF_OP_MEM_STREAM0_BUF0;
2504 output.op = CF_OP_MEM_STREAM0_BUF1;
2507 output.op = CF_OP_MEM_STREAM0_BUF2;
2510 output.op = CF_OP_MEM_STREAM0_BUF3;
2513 output.op += so->output[i].stream * 4;
2514 assert(output.op >= CF_OP_MEM_STREAM0_BUF0 && output.op <= CF_OP_MEM_STREAM3_BUF3);
2515 ctx->enabled_stream_buffers_mask |= (1 << so->output[i].output_buffer) << so->output[i].stream * 4;
2517 switch (so->output[i].output_buffer) {
2519 output.op = CF_OP_MEM_STREAM0;
2522 output.op = CF_OP_MEM_STREAM1;
2525 output.op = CF_OP_MEM_STREAM2;
2528 output.op = CF_OP_MEM_STREAM3;
2531 ctx->enabled_stream_buffers_mask |= 1 << so->output[i].output_buffer;
2533 r = r600_bytecode_add_output(ctx->bc, &output);
2550 reg = ctx->shader->output[ctx->edgeflag_output].gpr;
2581 struct r600_bytecode_output output;
2592 memcpy(cshader->shader.output, gs_shader->output, ocnt *
2629 struct r600_shader_io *out = &ctx.shader->output[i];
2658 if (so->output[i].stream == ring) {
2713 struct r600_shader_io *out = &ctx.shader->output[i];
2719 if (so->output[j].register_index == i) {
2720 if (so->output[j].stream == 0)
2722 if (so->output[j].stream > 0)
2728 memset(&output, 0, sizeof(output));
2729 output.gpr = out->gpr;
2730 output.elem_size = 3;
2731 output.swizzle_x = 0;
2732 output.swizzle_y = 1;
2733 output.swizzle_z = 2;
2734 output.swizzle_w = 3;
2735 output.burst_count = 1;
2736 output.type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM;
2737 output.op = CF_OP_EXPORT;
2740 output.array_base = 60;
2741 output.type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
2745 output.array_base = 61;
2748 output.type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
2749 output.swizzle_y = 7;
2750 output.swizzle_z = 7;
2751 output.swizzle_w = 7;
2758 output.array_base = next_param++;
2759 r600_bytecode_add_output(ctx.bc, &output);
2762 output.array_base = 61;
2765 output.type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
2766 output.swizzle_x = 7;
2767 output.swizzle_y = 7;
2768 output.swizzle_z = 0;
2769 output.swizzle_w = 7;
2776 output.array_base = next_param++;
2777 r600_bytecode_add_output(ctx.bc, &output);
2780 output.array_base = 61;
2783 output.type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
2786 output.swizzle_x = 7;
2787 output.swizzle_y = 7;
2788 output.swizzle_z = 7;
2789 output.swizzle_w = 0;
2799 output.array_base = next_param++;
2800 r600_bytecode_add_output(ctx.bc, &output);
2803 output.array_base = next_clip_pos++;
2804 output.type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
2807 output.swizzle_y = 4; /* 0 */
2808 output.swizzle_z = 4; /* 0 */
2809 output.swizzle_w = 5; /* 1 */
2812 output.array_base = next_param++;
2815 r600_bytecode_add_output(ctx.bc, &output);
2816 if (output.type == V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM)
2823 memset(&output, 0, sizeof(output));
2824 output.gpr = 0;
2825 output.elem_size = 3;
2826 output.swizzle_x = 7;
2827 output.swizzle_y = 7;
2828 output.swizzle_z = 7;
2829 output.swizzle_w = 7;
2830 output.burst_count = 1;
2831 output.type = 2;
2832 output.op = CF_OP_EXPORT;
2833 output.array_base = 60;
2834 output.type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
2835 r600_bytecode_add_output(ctx.bc, &output);
2840 memset(&output, 0, sizeof(output));
2841 output.gpr = 0;
2842 output.elem_size = 3;
2843 output.swizzle_x = 7;
2844 output.swizzle_y = 7;
2845 output.swizzle_z = 7;
2846 output.swizzle_w = 7;
2847 output.burst_count = 1;
2848 output.type = 2;
2849 output.op = CF_OP_EXPORT;
2850 output.array_base = next_param++;
2851 output.type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM;
2852 r600_bytecode_add_output(ctx.bc, &output);
2905 struct r600_bytecode_output output;
2914 * (map this output to GS input by name and sid) */
2919 struct r600_shader_io *out = &ctx->shader->output[i];
2931 if (stream > 0 && ctx->shader->output[i].name == TGSI_SEMANTIC_POSITION)
2938 memset(&output, 0, sizeof(struct r600_bytecode_output));
2939 output.gpr = ctx->shader->output[i].gpr;
2940 output.elem_size = 3;
2941 output.comp_mask = 0xF;
2942 output.burst_count = 1;
2945 output.type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_WRITE_IND;
2947 output.type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_WRITE;
2952 output.op = CF_OP_MEM_RING; break;
2954 output.op = CF_OP_MEM_RING1; break;
2956 output.op = CF_OP_MEM_RING2; break;
2958 output.op = CF_OP_MEM_RING3; break;
2962 output.array_base = ring_offset >> 2; /* in dwords */
2963 output.array_size = 0xfff;
2964 output.index_gpr = ctx->gs_export_gpr_tregs[effective_stream];
2966 output.array_base = ring_offset >> 2; /* in dwords */
2967 r600_bytecode_add_output(ctx->bc, &output);
2980 /* need to store the TCS output somewhere */
3018 /* fetch tcs output values into resv space */
3071 int param = r600_get_lds_unique_index(ctx->shader->output[i].name,
3072 ctx->shader->output[i].sid);
3097 alu.src[1].sel = ctx->shader->output[i].gpr;
3099 alu.src[2].sel = ctx->shader->output[i].gpr;
3202 unsigned name = ctx->shader->output[output_idx].name;
3203 int dreg = ctx->shader->output[output_idx].gpr;
3277 if (ctx->shader->output[j].name == TGSI_SEMANTIC_TESSINNER)
3279 if (ctx->shader->output[j].name == TGSI_SEMANTIC_TESSOUTER)
3333 ctx->shader->output[out_idx].gpr, out_comp,
3441 struct r600_bytecode_output output[ARRAY_SIZE(shader->output)];
3771 * output offsets etc. */
3897 /* GS thread with no output workaround - emit a cut at start of GS */
4015 memset(&shader->output[noutput], 0, 2*sizeof(struct r600_shader_io));
4016 shader->output[noutput].name = TGSI_SEMANTIC_CLIPDIST;
4017 shader->output[noutput].gpr = clipdist_temp[0];
4019 shader->output[noutput].name = TGSI_SEMANTIC_CLIPDIST;
4020 shader->output[noutput].gpr = clipdist_temp[1];
4023 /* reset spi_sid for clipvertex output to avoid confusing spi */
4024 shader->output[ctx.cv_output].spi_sid = 0;
4037 alu.src[0].sel = shader->output[ctx.cv_output].gpr;
4087 /* Export output */
4091 memset(&output[j], 0, sizeof(struct r600_bytecode_output));
4092 output[j].gpr = shader->output[i].gpr;
4093 output[j].elem_size = 3;
4094 output[j].swizzle_x = 0;
4095 output[j].swizzle_y = 1;
4096 output[j].swizzle_z = 2;
4097 output[j].swizzle_w = 3;
4098 output[j].burst_count = 1;
4099 output[j].type = 0xffffffff;
4100 output[j].op = CF_OP_EXPORT;
4104 switch (shader->output[i].name) {
4106 output[j].array_base = 60;
4107 output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
4112 output[j].array_base = 61;
4113 output[j].swizzle_y = 7;
4114 output[j].swizzle_z = 7;
4115 output[j].swizzle_w = 7;
4116 output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
4120 output[j].array_base = 61;
4121 output[j].swizzle_x = 7;
4122 output[j].swizzle_y = 0;
4123 output[j].swizzle_z = 7;
4124 output[j].swizzle_w = 7;
4125 output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
4131 if (shader->output[i].spi_sid) {
4132 output[j].array_base = next_param_base++;
4133 output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM;
4135 memcpy(&output[j], &output[j-1], sizeof(struct r600_bytecode_output));
4137 output[j].array_base = 61;
4138 output[j].swizzle_x = 7;
4139 output[j].swizzle_y = 7;
4140 output[j].swizzle_z = 0;
4141 output[j].swizzle_w = 7;
4142 output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
4148 if (shader->output[i].spi_sid) {
4149 output[j].array_base = next_param_base++;
4150 output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM;
4152 memcpy(&output[j], &output[j-1], sizeof(struct r600_bytecode_output));
4154 output[j].array_base = 61;
4155 output[j].swizzle_x = 7;
4156 output[j].swizzle_y = 7;
4157 output[j].swizzle_z = 7;
4158 output[j].swizzle_w = 0;
4159 output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
4166 output[j].array_base = next_clip_base++;
4167 output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
4171 if (shader->output[i].spi_sid) {
4174 memcpy(&output[j], &output[j-1], sizeof(struct r600_bytecode_output));
4175 output[j].array_base = next_param_base++;
4176 output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM;
4180 output[j].swizzle_y = 4; /* 0 */
4181 output[j].swizzle_z = 4; /* 0 */
4182 output[j].swizzle_w = 5; /* 1 */
4185 output[j].swizzle_x = 2;
4186 output[j].swizzle_y = 4; /* 0 */
4187 output[j].swizzle_z = 4; /* 0 */
4188 output[j].swizzle_w = 4; /* 0 */
4194 if (shader->output[i].name == TGSI_SEMANTIC_COLOR) {
4196 if (shader->output[i].sid >= max_color_exports) {
4201 output[j].swizzle_w = key.ps.alpha_to_one ? 5 : 3;
4202 output[j].array_base = shader->output[i].sid;
4203 output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
4205 shader->ps_color_export_mask |= (0xf << (shader->output[i].sid * 4));
4210 if (shader->output[i].sid > 0)
4211 for (unsigned x = 0; x < shader->output[i].sid; x++)
4214 if (shader->output[i].sid > shader->ps_export_highest)
4215 shader->ps_export_highest = shader->output[i].sid;
4219 memset(&output[j], 0, sizeof(struct r600_bytecode_output));
4220 output[j].gpr = shader->output[i].gpr;
4221 output[j].elem_size = 3;
4222 output[j].swizzle_x = 0;
4223 output[j].swizzle_y = 1;
4224 output[j].swizzle_z = 2;
4225 output[j].swizzle_w = key.ps.alpha_to_one ? 5 : 3;
4226 output[j].burst_count = 1;
4227 output[j].array_base = k;
4228 output[j].op = CF_OP_EXPORT;
4229 output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
4236 } else if (shader->output[i].name == TGSI_SEMANTIC_POSITION) {
4237 output[j].array_base = 61;
4238 output[j].swizzle_x = 2;
4239 output[j].swizzle_y = 7;
4240 output[j].swizzle_z = output[j].swizzle_w = 7;
4241 output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
4242 } else if (shader->output[i].name == TGSI_SEMANTIC_STENCIL) {
4243 output[j].array_base = 61;
4244 output[j].swizzle_x = 7;
4245 output[j].swizzle_y = 1;
4246 output[j].swizzle_z = output[j].swizzle_w = 7;
4247 output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
4248 } else if (shader->output[i].name == TGSI_SEMANTIC_SAMPLEMASK) {
4249 output[j].array_base = 61;
4250 output[j].swizzle_x = 7;
4251 output[j].swizzle_y = 7;
4252 output[j].swizzle_z = 0;
4253 output[j].swizzle_w = 7;
4254 output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
4256 R600_ERR("unsupported fragment output name %d\n", shader->output[i].name);
4269 if (output[j].type == 0xffffffff) {
4270 output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM;
4271 output[j].array_base = next_param_base++;
4277 memset(&output[j], 0, sizeof(struct r600_bytecode_output));
4278 output[j].gpr = 0;
4279 output[j].elem_size = 3;
4280 output[j].swizzle_x = 7;
4281 output[j].swizzle_y = 7;
4282 output[j].swizzle_z = 7;
4283 output[j].swizzle_w = 7;
4284 output[j].burst_count = 1;
4285 output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_POS;
4286 output[j].array_base = 60;
4287 output[j].op = CF_OP_EXPORT;
4291 /* add fake param output for vertex shader if no param is exported */
4293 memset(&output[j], 0, sizeof(struct r600_bytecode_output));
4294 output[j].gpr = 0;
4295 output[j].elem_size = 3;
4296 output[j].swizzle_x = 7;
4297 output[j].swizzle_y = 7;
4298 output[j].swizzle_z = 7;
4299 output[j].swizzle_w = 7;
4300 output[j].burst_count = 1;
4301 output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PARAM;
4302 output[j].array_base = 0;
4303 output[j].op = CF_OP_EXPORT;
4309 memset(&output[j], 0, sizeof(struct r600_bytecode_output));
4310 output[j].gpr = 0;
4311 output[j].elem_size = 3;
4312 output[j].swizzle_x = 7;
4313 output[j].swizzle_y = 7;
4314 output[j].swizzle_z = 7;
4315 output[j].swizzle_w = 7;
4316 output[j].burst_count = 1;
4317 output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
4318 output[j].array_base = 0;
4319 output[j].op = CF_OP_EXPORT;
4329 if (!(output_done & (1 << output[k].type))) {
4330 output_done |= (1 << output[k].type);
4331 output[k].op = CF_OP_EXPORT_DONE;
4334 /* add output to bytecode */
4336 r = r600_bytecode_add_output(ctx.bc, &output[i]);
4451 /* If we are already spilling and the output address is the same like
8942 cf->output.type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_READ_IND;
8943 cf->output.gpr = ctx->thread_id_gpr;
8944 cf->output.index_gpr = idx_gpr;
8945 cf->output.comp_mask = 0xf;
8946 cf->output.burst_count = 1;
8950 cf->output.elem_size = 0;
9085 cf->output.type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_WRITE_IND;
9086 cf->output.gpr = ctx->temp_reg;
9087 cf->output.index_gpr = temp_reg;
9088 cf->output.comp_mask = 1;
9089 cf->output.burst_count = 1;
9092 cf->output.elem_size = 0;
9098 cf->output.type = r600_bytecode_write_export_ack_type(ctx->bc, true);
9149 cf->output.type = r600_bytecode_write_export_ack_type(ctx->bc, true);
9150 cf->output.gpr = val_gpr;
9151 cf->output.index_gpr = idx_gpr;
9152 cf->output.comp_mask = 0xf;
9153 cf->output.burst_count = 1;
9156 cf->output.elem_size = 0;
9322 cf->output.type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_READ_IND;
9323 cf->output.gpr = ctx->thread_id_gpr;
9324 cf->output.index_gpr = idx_gpr;
9325 cf->output.comp_mask = 0xf;
9326 cf->output.burst_count = 1;
9330 cf->output.elem_size = 0;