Lines Matching refs:cs
45 struct radeon_cmdbuf *cs,
48 vram += (uint64_t)cs->used_vram_kb * 1024;
49 gtt += (uint64_t)cs->used_gart_kb * 1024;
76 &ring->cs, rbo->buf,
106 !radeon_cs_memory_below_limit(rctx->screen, &ring->cs,
118 struct radeon_cmdbuf *cs = &ring->cs;
123 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
124 radeon_emit(cs, reloc);
128 static inline void radeon_set_config_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num)
131 assert(cs->current.cdw + 2 + num <= cs->current.max_dw);
132 radeon_emit(cs, PKT3(PKT3_SET_CONFIG_REG, num, 0));
133 radeon_emit(cs, (reg - R600_CONFIG_REG_OFFSET) >> 2);
136 static inline void radeon_set_config_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value)
138 radeon_set_config_reg_seq(cs, reg, 1);
139 radeon_emit(cs, value);
142 static inline void radeon_set_context_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num)
145 assert(cs->current.cdw + 2 + num <= cs->current.max_dw);
146 radeon_emit(cs, PKT3(PKT3_SET_CONTEXT_REG, num, 0));
147 radeon_emit(cs, (reg - R600_CONTEXT_REG_OFFSET) >> 2);
150 static inline void radeon_set_context_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value)
152 radeon_set_context_reg_seq(cs, reg, 1);
153 radeon_emit(cs, value);
156 static inline void radeon_set_context_reg_idx(struct radeon_cmdbuf *cs,
161 assert(cs->current.cdw + 3 <= cs->current.max_dw);
162 radeon_emit(cs, PKT3(PKT3_SET_CONTEXT_REG, 1, 0));
163 radeon_emit(cs, (reg - R600_CONTEXT_REG_OFFSET) >> 2 | (idx << 28));
164 radeon_emit(cs, value);
167 static inline void radeon_set_sh_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num)
170 assert(cs->current.cdw + 2 + num <= cs->current.max_dw);
171 radeon_emit(cs, PKT3(PKT3_SET_SH_REG, num, 0));
172 radeon_emit(cs, (reg - SI_SH_REG_OFFSET) >> 2);
175 static inline void radeon_set_sh_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value)
177 radeon_set_sh_reg_seq(cs, reg, 1);
178 radeon_emit(cs, value);
181 static inline void radeon_set_uconfig_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num)
184 assert(cs->current.cdw + 2 + num <= cs->current.max_dw);
185 radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, num, 0));
186 radeon_emit(cs, (reg - CIK_UCONFIG_REG_OFFSET) >> 2);
189 static inline void radeon_set_uconfig_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value)
191 radeon_set_uconfig_reg_seq(cs, reg, 1);
192 radeon_emit(cs, value);
195 static inline void radeon_set_uconfig_reg_idx(struct radeon_cmdbuf *cs,
200 assert(cs->current.cdw + 3 <= cs->current.max_dw);
201 radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, 1, 0));
202 radeon_emit(cs, (reg - CIK_UCONFIG_REG_OFFSET) >> 2 | (idx << 28));
203 radeon_emit(cs, value);