Lines Matching defs:rdst
3781 struct r600_texture *rdst = (struct r600_texture*)dst;
3787 dst_mode = rdst->surface.u.legacy.level[dst_level].mode;
3817 addr = (uint64_t)rdst->surface.u.legacy.level[dst_level].offset_256B * 256;
3818 addr += (uint64_t)rdst->surface.u.legacy.level[dst_level].slice_size_dw * 4 * dst_z;
3825 addr += rdst->resource.gpu_address;
3829 slice_tile_max = (rdst->surface.u.legacy.level[dst_level].nblk_x * rdst->surface.u.legacy.level[dst_level].nblk_y) / (8*8);
3836 height = u_minify(rdst->resource.b.b.height0, dst_level);
3841 base = (uint64_t)rdst->surface.u.legacy.level[dst_level].offset_256B * 256;
3845 bank_h = eg_bank_wh(rdst->surface.u.legacy.bankh);
3846 bank_w = eg_bank_wh(rdst->surface.u.legacy.bankw);
3847 mt_aspect = eg_macro_tile_aspect(rdst->surface.u.legacy.mtilea);
3848 tile_split = eg_tile_split(rdst->surface.u.legacy.tile_split);
3849 base += rdst->resource.gpu_address;
3855 r600_need_dma_space(&rctx->b, ncopy * 9, &rdst->resource, &rsrc->resource);
3866 radeon_add_to_buffer_list(&rctx->b, &rctx->b.dma, &rdst->resource,
3895 struct r600_texture *rdst = (struct r600_texture*)dst;
3916 !r600_prepare_for_dma_blit(&rctx->b, rdst, dst_level, dstx, dsty,
3925 bpp = rdst->surface.bpe;
3926 dst_pitch = rdst->surface.u.legacy.level[dst_level].nblk_x * rdst->surface.bpe;
3929 dst_w = u_minify(rdst->resource.b.b.width0, dst_level);
3932 dst_mode = rdst->surface.u.legacy.level[dst_level].mode;
3967 dst_offset = (uint64_t)rdst->surface.u.legacy.level[dst_level].offset_256B * 256;
3968 dst_offset += (uint64_t)rdst->surface.u.legacy.level[dst_level].slice_size_dw * 4 * dst_z;