Lines Matching defs:image
1717 struct r600_image_view *image = &state->views[i];
1723 if (!image->base.resource)
1726 resource = (struct r600_resource *)image->base.resource;
1728 rtex = (struct r600_texture *)image->base.resource;
1749 radeon_emit(cs, image->cb_color_base); /* R_028C60_CB_COLOR0_BASE */
1750 radeon_emit(cs, image->cb_color_pitch); /* R_028C64_CB_COLOR0_PITCH */
1751 radeon_emit(cs, image->cb_color_slice); /* R_028C68_CB_COLOR0_SLICE */
1752 radeon_emit(cs, image->cb_color_view); /* R_028C6C_CB_COLOR0_VIEW */
1753 radeon_emit(cs, image->cb_color_info); /* R_028C70_CB_COLOR0_INFO */
1754 radeon_emit(cs, image->cb_color_attrib); /* R_028C74_CB_COLOR0_ATTRIB */
1755 radeon_emit(cs, image->cb_color_dim); /* R_028C78_CB_COLOR0_DIM */
1756 radeon_emit(cs, rtex ? rtex->cmask.base_address_reg : image->cb_color_base); /* R_028C7C_CB_COLOR0_CMASK */
1758 radeon_emit(cs, image->cb_color_fmask); /* R_028C84_CB_COLOR0_FMASK */
1759 radeon_emit(cs, image->cb_color_fmask_slice); /* R_028C88_CB_COLOR0_FMASK_SLICE */
1785 radeon_emit_array(cs, image->immed_resource_words, 8);
1792 radeon_emit_array(cs, image->resource_words, 8);
1797 if (!image->skip_mip_address_reloc) {
4166 struct pipe_resource *image;
4201 image = iview->resource;
4202 resource = (struct r600_resource *)image;
4204 r600_context_add_resource_size(ctx, image);
4208 pipe_resource_reference((struct pipe_resource **)&rview->base.resource, image);
4212 bool is_buffer = image->target == PIPE_BUFFER;
4213 struct r600_texture *rtex = (struct r600_texture *)image;
4231 color.dim = S_028C78_WIDTH_MAX(u_minify(image->width0, iview->u.tex.level) - 1) |
4232 S_028C78_HEIGHT_MAX(u_minify(image->height0, iview->u.tex.level) - 1);
4243 switch (image->target) {
4283 if (image->target != PIPE_BUFFER) {
4287 tex_params.width0 = image->width0;
4288 tex_params.height0 = image->height0;
4293 tex_params.target = image->target;