Lines Matching refs:info
534 const struct pipe_grid_info *info)
573 memcpy(num_work_groups_start, info->grid, 3 * sizeof(uint));
577 global_size_start[i] = info->grid[i] * info->block[i];
581 memcpy(local_size_start, info->block, 3 * sizeof(uint));
584 memcpy(kernel_parameters_start, info->input, shader->input_size);
603 const struct pipe_grid_info *info,
611 unsigned num_pipes = rctx->screen->b.info.r600_max_quad_pipes;
622 group_size *= info->block[i];
626 num_waves = (info->block[0] * info->block[1] * info->block[2] +
645 radeon_emit(cs, info->block[0]); /* R_0286EC_SPI_COMPUTE_NUM_THREAD_X */
646 radeon_emit(cs, info->block[1]); /* R_0286F0_SPI_COMPUTE_NUM_THREAD_Y */
647 radeon_emit(cs, info->block[2]); /* R_0286F4_SPI_COMPUTE_NUM_THREAD_Z */
660 if (info->indirect) {
669 radeon_emit(cs, info->grid[0]);
670 radeon_emit(cs, info->grid[1]);
671 radeon_emit(cs, info->grid[2]);
722 const struct pipe_grid_info *info)
760 if (info->indirect) {
761 struct r600_resource *indirect_resource = (struct r600_resource *)info->indirect;
763 unsigned offset = info->indirect_offset / 4;
769 rctx->cs_block_grid_sizes[i] = info->block[i];
770 rctx->cs_block_grid_sizes[i + 4] = info->indirect ? indirect_grid[i] : info->grid[i];
851 evergreen_emit_dispatch(rctx, info, indirect_grid);
927 const struct pipe_grid_info *info)
936 rctx->cs_shader_state.pc = info->pc;
939 info->pc, &use_kill);
946 COMPUTE_DBG(rctx->screen, "*** evergreen_launch_grid: pc = %u\n", info->pc);
949 evergreen_compute_upload_input(ctx, info);
950 compute_emit_cs(rctx, info);