Lines Matching defs:usage
61 unsigned usage)
142 unsigned usage)
190 unsigned usage, uint64_t *value)
283 /* Based on the usage, determine if it makes sense to use u-inteleaved tiling.
314 if (pres->base.usage == PIPE_USAGE_STREAM)
384 * for both memory usage and performance.
392 return can_tile && (pres->base.usage != PIPE_USAGE_STREAM);
953 unsigned usage, /* a combination of PIPE_MAP_x */
965 if ((usage & PIPE_MAP_DIRECTLY) && rsrc->image.layout.modifier != DRM_FORMAT_MOD_LINEAR)
970 transfer->base.usage = usage;
976 if (usage & PIPE_MAP_WRITE)
1002 if ((usage & PIPE_MAP_READ) && (valid || rsrc->track.nr_writers > 0)) {
1021 if ((usage & PIPE_MAP_DISCARD_RANGE) &&
1022 !(usage & PIPE_MAP_UNSYNCHRONIZED) &&
1027 usage |= PIPE_MAP_DISCARD_WHOLE_RESOURCE;
1030 bool create_new_bo = usage & PIPE_MAP_DISCARD_WHOLE_RESOURCE;
1034 !(usage & PIPE_MAP_UNSYNCHRONIZED) &&
1035 (usage & PIPE_MAP_WRITE) &&
1049 copy_resource = !(usage & PIPE_MAP_DISCARD_WHOLE_RESOURCE);
1103 } else if ((usage & PIPE_MAP_WRITE)
1107 } else if (!(usage & PIPE_MAP_UNSYNCHRONIZED)) {
1108 if (usage & PIPE_MAP_WRITE) {
1111 } else if (usage & PIPE_MAP_READ) {
1130 if (usage & PIPE_MAP_READ)
1143 if ((usage & dpw) == dpw && rsrc->index_cache)
1153 if (usage & PIPE_MAP_WRITE) {
1271 perf_debug(dev, "Transitioning to linear due to streaming usage");
1288 if (transfer->usage & PIPE_MAP_WRITE)
1297 if (transfer->usage & PIPE_MAP_WRITE) {
1324 if (transfer->usage & PIPE_MAP_WRITE) {