Lines Matching defs:zsa
259 const struct panfrost_zsa_state *zsa)
270 if (PAN_ARCH <= 5 && zsa->base.alpha_func != PIPE_FUNC_ALWAYS)
519 const struct panfrost_zsa_state *zsa = ctx->depth_stencil;
535 if (panfrost_fs_required(fs, so, &ctx->pipe_framebuffer, zsa)) {
552 ((enum mali_func) zsa->base.alpha_func == MALI_FUNC_ALWAYS);
562 bool force_ez_with_discard = !zsa->enabled && !has_oq;
634 bool back_enab = zsa->base.stencil[1].enabled;
640 cfg.alpha_reference = zsa->base.alpha_ref_value;
650 const struct panfrost_zsa_state *zsa = ctx->depth_stencil;
670 if (panfrost_fs_required(fs, ctx->blend, &ctx->pipe_framebuffer, zsa)) {
680 rsd.opaque[8] |= zsa->rsd_depth.opaque[0]
683 rsd.opaque[9] |= zsa->rsd_stencil.opaque[0]
687 rsd.opaque[10] |= zsa->stencil_front.opaque[0];
688 rsd.opaque[11] |= zsa->stencil_back.opaque[0];
811 const struct panfrost_zsa_state *zsa = ctx->depth_stencil;
814 bool back_enab = zsa->base.stencil[1].enabled;
832 pan_merge(dynamic, zsa->desc, DEPTH_STENCIL);
4311 pipe_zs_always_passes(const struct pipe_depth_stencil_alpha_state *zsa)
4313 if (zsa->depth_enabled && zsa->depth_func != PIPE_FUNC_ALWAYS)
4316 if (zsa->stencil[0].enabled && zsa->stencil[0].func != PIPE_FUNC_ALWAYS)
4319 if (zsa->stencil[1].enabled && zsa->stencil[1].func != PIPE_FUNC_ALWAYS)
4327 const struct pipe_depth_stencil_alpha_state *zsa)
4330 so->base = *zsa;
4332 const struct pipe_stencil_state front = zsa->stencil[0];
4334 zsa->stencil[1].enabled ? zsa->stencil[1] : front;
4336 enum mali_func depth_func = zsa->depth_enabled ?
4337 (enum mali_func) zsa->depth_func : MALI_FUNC_ALWAYS;
4340 if (PAN_ARCH <= 5 && !zsa->alpha_enabled)
4348 cfg.depth_write_mask = zsa->depth_writemask;
4383 cfg.depth_write_enable = zsa->depth_writemask;
4388 so->enabled = zsa->stencil[0].enabled ||
4389 (zsa->depth_enabled && zsa->depth_func != PIPE_FUNC_ALWAYS);
4391 so->zs_always_passes = pipe_zs_always_passes(zsa);
4392 so->writes_zs = util_writes_depth_stencil(zsa);
4395 assert(!zsa->depth_bounds_test);