Lines Matching refs:res

98       if (isv->res->base.b.target != PIPE_BUFFER) {
100 disable_rb_aux_buffer(ice, draw_aux_buffer_disabled, isv->res,
105 iris_resource_prepare_texture(ice, isv->res, isv->view.format,
111 iris_emit_buffer_barrier_for(batch, isv->res->bo,
129 struct iris_resource *res = (void *) pview->resource;
131 if (res->base.b.target != PIPE_BUFFER) {
134 res, pview->u.tex.level, 1,
144 iris_resource_prepare_access(ice, res,
150 iris_emit_buffer_barrier_for(batch, res->bo, IRIS_DOMAIN_DATA_WRITE);
221 struct iris_resource *res = (void *) cso_fb->cbufs[i]->texture;
223 iris_resource_prepare_texture(ice, res, surf->view.format,
237 struct iris_resource *res = (void *) surf->base.texture;
240 iris_resource_render_aux_usage(ice, res, surf->view.base_level,
251 iris_resource_prepare_render(ice, res, surf->view.base_level,
256 iris_cache_flush_for_render(batch, res->bo, aux_usage);
317 struct iris_resource *res = (void *) surf->base.texture;
324 iris_resource_finish_render(ice, res, desc->tex.level,
383 struct iris_resource *res = (void *)cbuf->buffer;
384 iris_emit_buffer_barrier_for(batch, res->bo, IRIS_DOMAIN_PULL_CONSTANT_READ);
399 struct iris_resource *res = (void *)ssbo->buffer;
400 iris_emit_buffer_barrier_for(batch, res->bo, IRIS_DOMAIN_DATA_WRITE);
432 struct iris_resource *res,
440 &res->base.b, res->aux.usage, level, true);
474 blorp_ccs_resolve(&blorp_batch, &surf, level, layer, 1, res->surf.format,
490 struct iris_resource *res,
497 assert(isl_aux_usage_has_mcs(res->aux.usage));
503 &res->base.b, res->aux.usage, 0, true);
504 iris_emit_buffer_barrier_for(batch, res->bo, IRIS_DOMAIN_RENDER_WRITE);
509 blorp_mcs_partial_resolve(&blorp_batch, &surf, res->surf.format,
517 const struct iris_resource *res)
519 switch (res->aux.usage) {
532 for (unsigned level = 0; level < res->surf.levels; ++level) {
533 if (!iris_resource_level_has_hiz(res, level))
546 return res->surf.samples == 1 && res->surf.dim == ISL_SURF_DIM_2D;
561 struct iris_resource *res,
566 assert(iris_resource_level_has_hiz(res, level));
613 &res->base.b, res->aux.usage, level, true);
650 iris_resource_level_has_hiz(const struct iris_resource *res, uint32_t level)
652 iris_resource_check_level_layer(res, level, 0);
654 if (!isl_aux_usage_has_hiz(res->aux.usage))
661 if (u_minify(res->base.b.width0, level) & 7)
664 if (u_minify(res->base.b.height0, level) & 3)
673 iris_resource_check_level_layer(UNUSED const struct iris_resource *res,
676 assert(level < res->surf.levels);
677 assert(layer < util_num_layers(&res->base.b, level));
681 miptree_level_range_length(const struct iris_resource *res,
684 assert(start_level < res->surf.levels);
687 num_levels = res->surf.levels;
691 assert(start_level + num_levels <= res->surf.levels);
697 miptree_layer_range_length(const struct iris_resource *res, uint32_t level,
700 assert(level <= res->base.b.last_level);
702 const uint32_t total_num_layers = iris_get_num_logical_layers(res, level);
714 iris_has_invalid_primary(const struct iris_resource *res,
718 if (res->aux.usage == ISL_AUX_USAGE_NONE)
722 num_levels = miptree_level_range_length(res, start_level, num_levels);
727 miptree_layer_range_length(res, level, start_layer, num_layers);
730 iris_resource_get_aux_state(res, level, start_layer + a);
741 struct iris_resource *res,
747 if (res->aux.usage == ISL_AUX_USAGE_NONE)
756 miptree_level_range_length(res, start_level, num_levels);
760 miptree_layer_range_length(res, level, start_layer, num_layers);
764 iris_resource_get_aux_state(res, level, layer);
776 } else if (isl_aux_usage_has_mcs(res->aux.usage)) {
778 iris_mcs_partial_resolve(ice, batch, res, layer, 1);
779 } else if (isl_aux_usage_has_hiz(res->aux.usage)) {
780 iris_hiz_exec(ice, batch, res, level, layer, 1, aux_op, false);
781 } else if (res->aux.usage == ISL_AUX_USAGE_STC_CCS) {
784 assert(isl_aux_usage_has_ccs(res->aux.usage));
785 iris_resolve_color(ice, batch, res, level, layer, aux_op);
789 isl_aux_state_transition_aux_op(aux_state, res->aux.usage, aux_op);
790 iris_resource_set_aux_state(ice, res, level, layer, 1, new_state);
797 struct iris_resource *res, uint32_t level,
801 if (res->aux.usage == ISL_AUX_USAGE_NONE)
805 miptree_layer_range_length(res, level, start_layer, num_layers);
810 iris_resource_get_aux_state(res, level, layer);
823 iris_resource_set_aux_state(ice, res, level, layer, 1, new_aux_state);
828 iris_resource_get_aux_state(const struct iris_resource *res,
831 iris_resource_check_level_layer(res, level, layer);
833 if (res->surf.usage & ISL_SURF_USAGE_DEPTH_BIT) {
834 assert(isl_aux_usage_has_hiz(res->aux.usage));
836 assert(res->surf.samples == 1 ||
837 res->surf.msaa_layout == ISL_MSAA_LAYOUT_ARRAY);
840 return res->aux.state[level][layer];
845 struct iris_resource *res, uint32_t level,
849 num_layers = miptree_layer_range_length(res, level, start_layer, num_layers);
851 if (res->surf.usage & ISL_SURF_USAGE_DEPTH_BIT) {
852 assert(iris_resource_level_has_hiz(res, level) ||
855 assert(res->surf.samples == 1 ||
856 res->surf.msaa_layout == ISL_MSAA_LAYOUT_ARRAY);
860 if (res->aux.state[level][start_layer + a] != aux_state) {
861 res->aux.state[level][start_layer + a] = aux_state;
870 if (res->mod_info && !res->mod_info->supports_clear_color) {
871 assert(res->mod_info->aux_usage != ISL_AUX_USAGE_NONE);
875 iris_mark_dirty_dmabuf(ice, &res->base.b);
882 const struct iris_resource *res,
888 switch (res->aux.usage) {
892 assert(res->surf.format == view_format);
893 return iris_sample_with_depth_aux(devinfo, res) ?
894 res->aux.usage : ISL_AUX_USAGE_NONE;
900 return res->aux.usage;
908 if (!iris_has_invalid_primary(res, 0, INTEL_REMAINING_LEVELS,
923 if (isl_formats_are_ccs_e_compatible(devinfo, res->surf.format,
925 return res->aux.usage;
945 struct iris_resource *res = (void *) pview->resource;
949 iris_resource_texture_aux_usage(ice, res, view_format);
966 const struct iris_resource *res)
968 assert(isl_aux_usage_has_mcs(res->aux.usage));
975 isl_format_get_layout(res->surf.format)->bpb <= 16) {
1001 struct iris_resource *res,
1010 iris_resource_texture_aux_usage(ice, res, view_format);
1018 if (!isl_formats_are_fast_clear_compatible(res->surf.format, view_format))
1022 !iris_can_sample_mcs_with_clear(devinfo, res)) {
1026 iris_resource_prepare_access(ice, res, start_level, num_levels,
1054 struct iris_resource *res, uint32_t level,
1064 switch (res->aux.usage) {
1068 assert(render_format == res->surf.format);
1069 return iris_resource_level_has_hiz(res, level) ?
1070 res->aux.usage : ISL_AUX_USAGE_NONE;
1073 assert(render_format == res->surf.format);
1074 return res->aux.usage;
1078 return res->aux.usage;
1094 res->surf.format,
1095 res->aux.clear_color,
1096 res->aux.clear_color_unknown)) {
1100 if (res->aux.usage == ISL_AUX_USAGE_CCS_D)
1103 if (isl_formats_are_ccs_e_compatible(devinfo, res->surf.format,
1105 return res->aux.usage;
1116 struct iris_resource *res, uint32_t level,
1120 iris_resource_prepare_access(ice, res, level, 1, start_layer,
1127 struct iris_resource *res, uint32_t level,
1131 iris_resource_finish_write(ice, res, level, start_layer, layer_count,