Lines Matching refs:state
72 if (ice->state.prim_mode != info->mode) {
73 ice->state.prim_mode = info->mode;
74 ice->state.dirty |= IRIS_DIRTY_VF_TOPOLOGY;
79 if (points_or_lines != ice->state.prim_is_points_or_lines) {
80 ice->state.prim_is_points_or_lines = points_or_lines;
81 ice->state.dirty |= IRIS_DIRTY_CLIP;
86 ice->state.vertices_per_patch != ice->state.patch_vertices) {
87 ice->state.vertices_per_patch = ice->state.patch_vertices;
88 ice->state.dirty |= IRIS_DIRTY_VF_TOPOLOGY;
92 ice->state.stage_dirty |= IRIS_STAGE_DIRTY_UNCOMPILED_TCS;
99 ice->state.stage_dirty |= IRIS_STAGE_DIRTY_CONSTANTS_TCS;
100 ice->state.shaders[MESA_SHADER_TESS_CTRL].sysvals_need_upload = true;
106 ice->state.cut_index;
107 if (ice->state.primitive_restart != info->primitive_restart ||
108 ice->state.cut_index != cut_index) {
109 ice->state.dirty |= IRIS_DIRTY_VF;
110 ice->state.cut_index = cut_index;
111 ice->state.dirty |=
112 ((ice->state.primitive_restart != info->primitive_restart) &&
114 ice->state.primitive_restart = info->primitive_restart;
130 if (ice->state.vs_uses_draw_params) {
159 if (ice->state.vs_uses_derived_draw_params) {
178 ice->state.dirty |= IRIS_DIRTY_VERTEX_BUFFERS |
204 if (ice->state.predicate == IRIS_PREDICATE_STATE_USE_BIT) {
210 const uint64_t orig_dirty = ice->state.dirty;
211 const uint64_t orig_stage_dirty = ice->state.stage_dirty;
220 ice->state.dirty &= ~IRIS_ALL_DIRTY_FOR_RENDER;
221 ice->state.stage_dirty &= ~IRIS_ALL_STAGE_DIRTY_FOR_RENDER;
227 ice->state.predicate == IRIS_PREDICATE_STATE_USE_BIT) {
233 ice->state.dirty = orig_dirty;
234 ice->state.stage_dirty = orig_stage_dirty;
276 if (ice->state.predicate == IRIS_PREDICATE_STATE_DONT_RENDER)
280 ice->state.dirty |= IRIS_ALL_DIRTY_FOR_RENDER;
281 ice->state.stage_dirty |= IRIS_ALL_STAGE_DIRTY_FOR_RENDER;
291 if (ice->state.dirty & IRIS_DIRTY_RENDER_RESOLVES_AND_FLUSHES) {
301 if (ice->state.dirty & IRIS_DIRTY_RENDER_MISC_BUFFER_FLUSHES) {
308 batch->screen->vtbl.update_binder_address(batch, &ice->state.binder);
321 ice->state.dirty &= ~IRIS_ALL_DIRTY_FOR_RENDER;
322 ice->state.stage_dirty &= ~IRIS_ALL_STAGE_DIRTY_FOR_RENDER;
331 struct iris_state_ref *grid_ref = &ice->state.grid_size;
332 struct iris_state_ref *state_ref = &ice->state.grid_surf_state;
345 memset(ice->state.last_grid, 0, sizeof(ice->state.last_grid));
347 } else if (memcmp(ice->state.last_grid, grid->grid, sizeof(grid->grid)) != 0) {
348 memcpy(ice->state.last_grid, grid->grid, sizeof(grid->grid));
349 u_upload_data(ice->state.dynamic_uploader, 0, sizeof(grid->grid), 4,
354 /* If we changed the grid, the old surface state is invalid. */
365 u_upload_alloc(ice->state.surface_uploader, 0, isl_dev->ss.size,
378 ice->state.stage_dirty |= IRIS_STAGE_DIRTY_BINDINGS_CS;
387 if (ice->state.predicate == IRIS_PREDICATE_STATE_DONT_RENDER)
391 ice->state.dirty |= IRIS_ALL_DIRTY_FOR_COMPUTE;
392 ice->state.stage_dirty |= IRIS_ALL_STAGE_DIRTY_FOR_COMPUTE;
395 if (ice->state.dirty & IRIS_DIRTY_COMPUTE_RESOLVES_AND_FLUSHES)
398 if (ice->state.dirty & IRIS_DIRTY_COMPUTE_MISC_BUFFER_FLUSHES)
405 if (memcmp(ice->state.last_block, grid->block, sizeof(grid->block)) != 0) {
406 memcpy(ice->state.last_block, grid->block, sizeof(grid->block));
407 ice->state.stage_dirty |= IRIS_STAGE_DIRTY_CONSTANTS_CS;
408 ice->state.shaders[MESA_SHADER_COMPUTE].sysvals_need_upload = true;
411 if (ice->state.last_grid_dim != grid->work_dim) {
412 ice->state.last_grid_dim = grid->work_dim;
413 ice->state.stage_dirty |= IRIS_STAGE_DIRTY_CONSTANTS_CS;
414 ice->state.shaders[MESA_SHADER_COMPUTE].sysvals_need_upload = true;
420 batch->screen->vtbl.update_binder_address(batch, &ice->state.binder);
422 if (ice->state.compute_predicate) {
424 ice->state.compute_predicate, 0);
425 ice->state.compute_predicate = NULL;
434 ice->state.dirty &= ~IRIS_ALL_DIRTY_FOR_COMPUTE;
435 ice->state.stage_dirty &= ~IRIS_ALL_STAGE_DIRTY_FOR_COMPUTE;