Lines Matching refs:specs
208 return screen->specs.stream_count;
218 return screen->specs.max_texture_size;
222 int log2_max_tex_size = util_last_bit(screen->specs.max_texture_size);
234 return screen->specs.seamless_cube_map;
261 return screen->specs.max_varyings;
323 return util_last_bit(screen->specs.max_texture_size);
340 bool ubo_enable = screen->specs.halti >= 2;
372 return shader == PIPE_SHADER_FRAGMENT ? screen->specs.max_varyings
373 : screen->specs.vertex_max_elements;
399 return screen->specs.halti >= 2;
403 ? screen->specs.fragment_sampler_count
404 : screen->specs.vertex_sampler_count;
411 ? screen->specs.max_ps_uniforms * sizeof(float[4])
412 : screen->specs.max_vs_uniforms * sizeof(float[4]);
446 if (screen->specs.halti < 0 &&
474 supported = screen->specs.tex_astc;
619 if ((screen->specs.pixel_pipes == 1 || screen->specs.single_buffer) &&
688 screen->specs.max_vs_uniforms = 256;
689 screen->specs.max_ps_uniforms = 64;
690 } else if (screen->specs.num_constants == 320) {
691 screen->specs.max_vs_uniforms = 256;
692 screen->specs.max_ps_uniforms = 64;
693 } else if (screen->specs.num_constants > 256 &&
696 screen->specs.max_vs_uniforms = 256;
697 screen->specs.max_ps_uniforms = 64;
698 } else if (screen->specs.num_constants > 256) {
699 screen->specs.max_vs_uniforms = 256;
700 screen->specs.max_ps_uniforms = 256;
701 } else if (screen->specs.num_constants == 256) {
702 screen->specs.max_vs_uniforms = 256;
703 screen->specs.max_ps_uniforms = 256;
705 screen->specs.max_vs_uniforms = 168;
706 screen->specs.max_ps_uniforms = 64;
714 if (screen->specs.halti >= 1) {
715 screen->specs.vertex_sampler_offset = 16;
716 screen->specs.fragment_sampler_count = 16;
717 screen->specs.vertex_sampler_count = 16;
719 screen->specs.vertex_sampler_offset = 8;
720 screen->specs.fragment_sampler_count = 8;
721 screen->specs.vertex_sampler_count = 4;
725 screen->specs.vertex_sampler_count = 0;
745 screen->specs.vertex_output_buffer_size = val;
751 screen->specs.vertex_cache_size = val;
757 screen->specs.shader_core_count = val;
763 screen->specs.stream_count = val;
769 screen->specs.max_registers = val;
775 screen->specs.pixel_pipes = val;
785 screen->specs.num_constants = val;
791 screen->specs.max_varyings = MAX2(val, ETNA_NUM_VARYINGS);
796 screen->specs.halti = 5; /* New GC7000/GC8x00 */
798 screen->specs.halti = 4; /* Old GC7000/GC7400 */
800 screen->specs.halti = 3; /* None? */
802 screen->specs.halti = 2; /* GC2500/GC3000/GC5000/GC6400 */
804 screen->specs.halti = 1; /* GC900/GC4000/GC7000UL */
806 screen->specs.halti = 0; /* GC880/GC2000/GC7000TM */
808 screen->specs.halti = -1; /* GC7000nanolite / pre-GC2000 except GC880 */
809 if (screen->specs.halti >= 0)
810 DBG("etnaviv: GPU arch: HALTI%d", screen->specs.halti);
814 screen->specs.can_supertile =
816 screen->specs.bits_per_tile =
820 screen->specs.ts_clear_value =
822 screen->specs.bits_per_tile == 4 ? 0x11111111 : 0x55555555;
824 screen->specs.vs_need_z_div =
826 screen->specs.has_sin_cos_sqrt =
828 screen->specs.has_sign_floor_ceil =
830 screen->specs.has_shader_range_registers =
832 screen->specs.npot_tex_any_wrap =
834 screen->specs.has_new_transcendentals =
836 screen->specs.has_halti2_instructions =
838 screen->specs.has_no_oneconst_limit =
840 screen->specs.v4_compression =
842 screen->specs.seamless_cube_map =
846 if (screen->specs.halti >= 5) {
848 screen->specs.vs_offset = 0;
849 screen->specs.ps_offset = 0;
850 screen->specs.max_instructions = 0; /* Do not program shaders manually */
851 screen->specs.has_icache = true;
859 screen->specs.vs_offset = 0xC000;
864 screen->specs.ps_offset = 0x8000 + 0x1000;
865 screen->specs.max_instructions = 256; /* maximum number instructions for non-icache use */
866 screen->specs.has_icache = true;
869 screen->specs.vs_offset = 0xC000;
870 screen->specs.ps_offset = 0xD000; /* like vivante driver */
871 screen->specs.max_instructions = 256;
873 screen->specs.vs_offset = 0x4000;
874 screen->specs.ps_offset = 0x6000;
875 screen->specs.max_instructions = instruction_count;
877 screen->specs.has_icache = false;
881 screen->specs.vertex_max_elements = 16;
886 screen->specs.vertex_max_elements = 10;
892 if (screen->specs.halti >= 5) {
893 screen->specs.has_unified_uniforms = true;
894 screen->specs.vs_uniforms_offset = VIVS_SH_HALTI5_UNIFORMS_MIRROR(0);
895 screen->specs.ps_uniforms_offset = VIVS_SH_HALTI5_UNIFORMS(screen->specs.max_vs_uniforms*4);
896 } else if (screen->specs.halti >= 1) {
899 screen->specs.has_unified_uniforms = true;
900 screen->specs.vs_uniforms_offset = VIVS_SH_UNIFORMS(0);
905 screen->specs.ps_uniforms_offset = VIVS_SH_UNIFORMS(screen->specs.max_vs_uniforms*4);
907 screen->specs.has_unified_uniforms = false;
908 screen->specs.vs_uniforms_offset = VIVS_VS_UNIFORMS(0);
909 screen->specs.ps_uniforms_offset = VIVS_PS_UNIFORMS(0);
912 screen->specs.max_texture_size =
914 screen->specs.max_rendertarget_size =
917 screen->specs.single_buffer = VIV_FEATURE(screen, chipMinorFeatures4, SINGLE_BUFFER);
918 if (screen->specs.single_buffer)
919 DBG("etnaviv: Single buffer mode enabled with %d pixel pipes", screen->specs.pixel_pipes);
921 screen->specs.tex_astc = VIV_FEATURE(screen, chipMinorFeatures4, TEXTURE_ASTC) &&
924 screen->specs.use_blt = VIV_FEATURE(screen, chipMinorFeatures5, BLT_ENGINE);
1100 if (screen->specs.halti >= 5 && !etnaviv_device_softpin_capable(dev)) {
1113 screen->specs.can_supertile = 0;
1115 screen->specs.single_buffer = 0;
1159 if (screen->specs.halti >= 5) {