Lines Matching defs:entry
872 * register is 1/2 of one of these URB entry units, so that leaves us 16 EU
1521 set_blend_entry_bits(struct crocus_batch *batch, BLEND_ENTRY_GENXML *entry,
1545 entry->LogicOpEnable = cso_blend->cso.logicop_enable;
1546 entry->LogicOpFunction = cso_blend->cso.logicop_func;
1552 entry->ColorBufferBlendEnable =
1555 entry->ColorBufferBlendEnable = 1;
1557 entry->ColorBlendFunction = rt->rgb_func;
1558 entry->AlphaBlendFunction = rt->alpha_func;
1559 entry->SourceBlendFactor = (int) src_rgb;
1560 entry->SourceAlphaBlendFactor = (int) src_alpha;
1561 entry->DestinationBlendFactor = (int) dst_rgb;
1562 entry->DestinationAlphaBlendFactor = (int) dst_alpha;
1572 entry->ColorBufferBlendEnable = 1;
1573 entry->ColorBlendFunction = PIPE_BLEND_ADD;
1574 entry->AlphaBlendFunction = PIPE_BLEND_ADD;
1575 entry->SourceBlendFactor = PIPE_BLENDFACTOR_ONE;
1576 entry->SourceAlphaBlendFactor = PIPE_BLENDFACTOR_ONE;
1577 entry->DestinationBlendFactor = PIPE_BLENDFACTOR_ZERO;
1578 entry->DestinationAlphaBlendFactor = PIPE_BLENDFACTOR_ZERO;
4387 crocus_pack_state(GENX(SO_DECL_ENTRY), so_decl_map + 3 + i * 2, entry) {
4388 entry.Stream0Decl = so_decl[0][i];
4389 entry.Stream1Decl = so_decl[1][i];
4390 entry.Stream2Decl = so_decl[2][i];
4391 entry.Stream3Decl = so_decl[3][i];
5307 * too big to map using a single binding table entry?
5321 * buffer. We can't configure the binding table entry to prevent output
5324 * binding table entry to just allow a single output.
6144 struct GENX(BLEND_STATE_ENTRY) entry = { 0 };
6145 #define be entry
6157 struct GENX(BLEND_STATE_ENTRY) entry = { 0 };
6164 be.IndependentAlphaBlendEnable = set_blend_entry_bits(batch, &entry, cso_blend, i) ||
6168 entry.LogicOpEnable = cso_blend->cso.logicop_enable;
6169 entry.LogicOpFunction = cso_blend->cso.logicop_func;
6172 entry.ColorClampRange = COLORCLAMP_RTFORMAT;
6173 entry.PreBlendColorClampEnable = true;
6174 entry.PostBlendColorClampEnable = true;
6176 entry.WriteDisableRed = !(rt->colormask & PIPE_MASK_R);
6177 entry.WriteDisableGreen = !(rt->colormask & PIPE_MASK_G);
6178 entry.WriteDisableBlue = !(rt->colormask & PIPE_MASK_B);
6179 entry.WriteDisableAlpha = !(rt->colormask & PIPE_MASK_A);
6182 GENX(BLEND_STATE_ENTRY_pack)(NULL, &blend_map[1 + i * 2], &entry);
6184 GENX(BLEND_STATE_ENTRY_pack)(NULL, &blend_map[i * 2], &entry);
8960 * urb entry to vsunit software is required to send a "GS NULL