Lines Matching defs:devinfo
1067 const struct intel_device_info *devinfo = &batch->screen->devinfo;
1130 const bool urb_low_bw = has_slm && devinfo->platform != INTEL_PLATFORM_BYT;
1134 const unsigned n0_urb = (devinfo->platform == INTEL_PLATFORM_BYT ? 32 : 0);
1148 devinfo->platform == INTEL_PLATFORM_BYT ? BYT_SQGPCI_DEFAULT : SQGPCI_DEFAULT;
1326 batch->screen->devinfo.max_constant_urb_size_kb;
1353 if (batch->screen->devinfo.platform == INTEL_PLATFORM_IVB)
1367 UNUSED const struct intel_device_info *devinfo = &batch->screen->devinfo;
1416 UNUSED const struct intel_device_info *devinfo = &batch->screen->devinfo;
1798 UNUSED const struct intel_device_info *devinfo = &screen->devinfo;
1867 crocus_get_depth_stencil_resources(devinfo,
2030 if (screen->devinfo.platform == INTEL_PLATFORM_CHV)
2675 const struct intel_device_info *devinfo = &screen->devinfo;
2693 crocus_get_depth_stencil_resources(devinfo, tex, &zres, &sres);
2711 crocus_format_for_usage(devinfo, tmpl->format, usage);
2836 const struct intel_device_info *devinfo = &screen->devinfo;
2847 crocus_format_for_usage(devinfo, tmpl->format, usage);
2850 !isl_format_supports_rendering(devinfo, fmt.fmt)) {
2921 if (!devinfo->has_surface_tile_offset &&
3058 const struct intel_device_info *devinfo = &screen->devinfo;
3082 crocus_format_for_usage(devinfo, img->format, usage);
3090 if (!isl_has_matching_typed_storage_image_format(devinfo, fmt.fmt))
3093 fmt.fmt = isl_lower_storage_image_format(devinfo, fmt.fmt);
3404 const struct intel_device_info *devinfo = &screen->devinfo;
3460 crocus_get_depth_stencil_resources(devinfo, cso->zsbuf->texture, &zres,
3672 (GFX_VERx10 < 75 && screen->devinfo.platform != INTEL_PLATFORM_BYT) * 2;
3777 const struct intel_device_info *devinfo = &screen->devinfo;
3810 crocus_format_for_usage(devinfo, state[i].src_format, 0);
3887 crocus_format_for_usage(devinfo, state[edgeflag_index].src_format, 0);
5724 if (batch->screen->devinfo.platform == INTEL_PLATFORM_IVB)
6060 const struct intel_device_info *devinfo = &batch->screen->devinfo;
6100 intel_get_urb_config(devinfo,
6108 if (devinfo->platform == INTEL_PLATFORM_IVB)
6472 batch->screen->devinfo.max_threads_per_psd - 2;
6474 ps.MaximumNumberofThreads = batch->screen->devinfo.max_wm_threads - 1;
6750 if (batch->screen->devinfo.platform == INTEL_PLATFORM_IVB)
6772 vs.MaximumNumberofThreads = batch->screen->devinfo.max_vs_threads - 1;
6783 CLAMP(batch->ice->urb.nr_vs_entries / 2, 1, batch->screen->devinfo.max_vs_threads) - 1;
6840 if (batch->screen->devinfo.gt == 2 && ice->state.gs_enabled != active)
6901 GFX_VER == 8 ? (batch->screen->devinfo.max_gs_threads / 2 - 1) :
6902 (batch->screen->devinfo.max_gs_threads - 1);
6966 gs.MaximumNumberofThreads = batch->screen->devinfo.max_gs_threads - 1;
7004 hs.MaximumNumberofThreads = batch->screen->devinfo.max_tcs_threads - 1;
7030 ds.MaximumNumberofThreads = batch->screen->devinfo.max_tes_threads - 1;
7127 crocus_get_depth_stencil_resources(&batch->screen->devinfo,
7276 wm.MaximumNumberofThreads = batch->screen->devinfo.max_wm_threads - 1;
7462 crocus_get_depth_stencil_resources(&batch->screen->devinfo, cso->zsbuf->texture, &zres, &sres);
7889 mi_builder_init(&b, &batch->screen->devinfo, batch);
7995 mi_builder_init(&b, &batch->screen->devinfo, batch);
8052 const struct intel_device_info *devinfo = &screen->devinfo;
8059 brw_cs_get_dispatch_info(devinfo, cs_prog_data, grid->block);
8115 devinfo->max_cs_threads * devinfo->subslice_total - 1;
8496 UNUSED const struct intel_device_info *devinfo = &batch->screen->devinfo;
8921 const struct intel_device_info *devinfo = &batch->screen->devinfo;
8933 if (nr_vs_entries > devinfo->urb.max_entries[MESA_SHADER_VERTEX])
8934 nr_vs_entries = devinfo->urb.max_entries[MESA_SHADER_VERTEX];
8936 if (nr_gs_entries > devinfo->urb.max_entries[MESA_SHADER_GEOMETRY])
8937 nr_gs_entries = devinfo->urb.max_entries[MESA_SHADER_GEOMETRY];
8944 devinfo->urb.min_entries[MESA_SHADER_VERTEX]);
9186 assert(screen->devinfo.verx10 == GFX_VERx10);
9187 assert(screen->devinfo.ver == GFX_VER);