Lines Matching defs:buffer
59 * we can simply memcpy them into a batch buffer.
571 * Emit MI_LOAD_REGISTER_MEM to load a 32-bit MMIO register from a buffer.
584 * Load a 64-bit value from a buffer into a MMIO register via
935 cmap = pipe_buffer_map_range(&ice->ctx, ice->state.shaders[stage].constbufs[block_index].buffer,
1304 * GT1/GT2 have a maximum constant buffer size of 16kB, while Haswell GT3
1311 * Currently we split the constant buffer space evenly among whatever stages
1931 * prior to the LRI. If stencil buffer writes are enabled, then a Render * Cache Flush is also necessary.
2254 * buffer object yet, because 3DSTATE_SAMPLER_STATE_POINTERS requires
2828 * can be bound as a render target or depth/stencil buffer.
3445 /* update SF's depth buffer format */
3495 if (input && input->buffer_size && (input->buffer || input->user_buffer)) {
3500 pipe_resource_reference(&cbuf->buffer, NULL);
3502 &cbuf->buffer_offset, &cbuf->buffer, (void **) &map);
3504 if (!cbuf->buffer) {
3515 crocus_resource_bo(cbuf->buffer)->size - cbuf->buffer_offset);
3517 struct crocus_resource *res = (void *) cbuf->buffer;
3547 &cbuf->buffer_offset, &cbuf->buffer, (void **) &map);
3608 * SURFACE_STATE here, as the buffer offset may change each time.
3628 if (buffers && buffers[i].buffer) {
3629 struct crocus_resource *res = (void *) buffers[i].buffer;
3631 pipe_resource_reference(&ssbo->buffer, &res->base.b);
3644 pipe_resource_reference(&shs->ssbo[start_slot + i].buffer, NULL);
3684 if (!state->is_user_buffer && state->buffer.resource) {
3685 struct crocus_resource *res = (void *)state->buffer.resource;
3690 if (state->buffer.resource)
3691 end = state->buffer.resource->width0 + padding;
4010 * "Target" here refers to a destination buffer. We translate this into
4012 * know which buffer this represents, or whether we ought to zero the
4029 pipe_resource_reference(&cso->base.buffer, p_res);
4055 pipe_resource_reference(&cso->base.buffer, NULL);
4159 struct crocus_resource *res = (void *) tgt->base.buffer;
4188 // the buffer before. We can do this by just clearing out the
4189 // count of writes to the prim count buffer.
4292 const int buffer = output->output_buffer;
4297 buffer_mask[stream_id] |= 1 << buffer;
4311 int skip_components = output->dst_offset - next_offset[buffer];
4322 next_offset[buffer] = output->dst_offset + output->num_components;
4357 // TODO: Double-check that stride == 0 means no buffer. Probably this
4358 // needs to go elsewhere, where the buffer enable stuff is actually
4366 /* Set buffer pitches; 0 means unbound. */
5049 * upper 20 bits of the GPU address of the MCS buffer; the lower 12 bits
5050 * contain other control information. Since buffer addresses are always
5143 struct pipe_constant_buffer *buffer)
5152 crocus_resource_bo(buffer->buffer),
5153 buffer->buffer_offset,
5155 .size_B = buffer->buffer_size,
5159 .mocs = crocus_mocs(crocus_resource_bo(buffer->buffer), isl_dev));
5167 struct pipe_shader_buffer *buffer, bool writeable)
5179 crocus_resource_bo(buffer->buffer),
5180 buffer->buffer_offset,
5182 .size_B = buffer->buffer_size,
5186 .mocs = crocus_mocs(crocus_resource_bo(buffer->buffer), isl_dev));
5296 const int buffer = output->output_buffer;
5299 struct crocus_resource *buf = (struct crocus_resource *)ice->state.so_target[buffer]->buffer;
5300 unsigned stride_dwords = so_info->stride[buffer];
5301 unsigned offset_dwords = ice->state.so_target[buffer]->buffer_offset / 4 + output->dst_offset;
5303 size_t size_dwords = (ice->state.so_target[buffer]->buffer_offset + ice->state.so_target[buffer]->buffer_size) / 4;
5306 /* FIXME: can we rely on core Mesa to ensure that the buffer isn't
5313 /* There is room for at least 1 transform feedback output in the buffer.
5315 * buffer has room for.
5321 * buffer. We can't configure the binding table entry to prevent output
5486 if (shs->constbufs[i].buffer)
5493 if (shs->ssbo[i].buffer)
5548 /* Set buffer sizes on Gen8+ or upper bounds on Gen4-7 */
5677 struct crocus_resource *res = (void *) cbuf->buffer;
5741 * buffer 3 read length equal to zero committed followed by a
5742 * 3DSTATE_CONSTANT_* with buffer 0 read length not equal to
6574 struct crocus_resource *res = (void *) tgt->base.buffer;
7602 struct crocus_bo *bo = crocus_resource_bo(buf->buffer.resource);
7884 "ensure indirect draw buffer is flushed",
7920 /* Upload the current draw count from the draw parameters buffer
7949 struct crocus_bo *bo = crocus_resource_bo(indirect->buffer);
8296 pipe_resource_reference(&shs->constbufs[i].buffer, NULL);
8302 pipe_resource_reference(&shs->ssbo[i].buffer, NULL);
8311 pipe_resource_reference(&ice->state.vertex_buffers[i].buffer.resource, NULL);
8342 struct pipe_vertex_buffer *buffer = &ice->state.vertex_buffers[i];
8344 if (!buffer->is_user_buffer && &res->base.b == buffer->buffer.resource)
8363 (ice->state.so_target[i]->buffer == &res->base.b)) {
8381 /* Skip constant buffer 0, it's for regular uniforms, not UBOs */
8387 if (res->bo == crocus_resource_bo(cbuf->buffer)) {
8399 if (res->bo == crocus_resource_bo(ssbo->buffer)) {
8401 .buffer = &res->base.b,
9015 * the end of the previous batch buffer. This has been fine so far since
9075 /* unreference any index buffer so it get reemitted. */