Lines Matching defs:batch
155 struct crocus_batch *batch = &ice->batches[q->batch_idx];
156 struct crocus_screen *screen = batch->screen;
163 screen->vtbl.store_data_imm64(batch, bo, offset, true);
167 crocus_emit_pipe_control_write(batch, "query: mark available",
177 crocus_pipelined_write(struct crocus_batch *batch,
184 crocus_emit_pipe_control_write(batch, "query: pipelined snapshot write",
192 struct crocus_batch *batch = &ice->batches[q->batch_idx];
194 struct crocus_screen *screen = batch->screen;
199 crocus_emit_pipe_control_flush(batch,
224 screen->vtbl.store_register_mem64(batch,
233 screen->vtbl.store_register_mem64(batch,
263 screen->vtbl.store_register_mem64(batch, reg, bo, offset, false);
276 struct crocus_batch *batch = &ice->batches[CROCUS_BATCH_RENDER];
277 struct crocus_screen *screen = batch->screen;
281 crocus_emit_pipe_control_flush(batch,
291 screen->vtbl.store_register_mem64(batch, SO_NUM_PRIMS_WRITTEN(s),
293 screen->vtbl.store_register_mem64(batch, SO_PRIM_STORAGE_NEEDED(s),
598 struct crocus_batch *batch = &ice->batches[q->batch_idx];
602 crocus_batch_reference_signal_syncobj(batch, &q->syncobj);
629 crocus_batch_reference_signal_syncobj(batch, &q->syncobj);
660 return crocus_get_monitor_result(ctx, q->monitor, wait, result->batch);
671 struct crocus_batch *batch = &ice->batches[q->batch_idx];
672 if (q->syncobj == crocus_batch_get_signal_syncobj(batch))
673 crocus_batch_flush(batch);
713 struct crocus_batch *batch = &ice->batches[q->batch_idx];
714 struct crocus_screen *screen = batch->screen;
715 const struct intel_device_info *devinfo = &batch->screen->devinfo;
730 if (q->syncobj == crocus_batch_get_signal_syncobj(batch))
731 crocus_batch_flush(batch);
733 screen->vtbl.copy_mem_mem(batch, dst_bo, offset,
749 screen->vtbl.store_data_imm32(batch, dst_bo, offset, q->result);
751 screen->vtbl.store_data_imm64(batch, dst_bo, offset, q->result);
758 crocus_emit_pipe_control_flush(batch,
768 mi_builder_init(&b, &batch->screen->devinfo, batch);
822 struct crocus_batch *batch = &ice->batches[CROCUS_BATCH_RENDER];
838 crocus_emit_pipe_control_flush(batch,
844 struct crocus_screen *screen = batch->screen;
845 screen->vtbl.load_register_mem64(batch, MI_PREDICATE_SRC0, bo,
847 screen->vtbl.load_register_mem64(batch, MI_PREDICATE_SRC1, bo,
856 crocus_batch_emit(batch, &mi_predicate, sizeof(uint32_t));
859 mi_builder_init(&b, &batch->screen->devinfo, batch);
884 /* We immediately set the predicate on the render batch, as all the
899 crocus_batch_emit(batch, &mi_predicate, sizeof(uint32_t));
964 crocus_emit_compute_predicate(struct crocus_batch *batch)
966 struct crocus_context *ice = batch->ice;
967 struct crocus_screen *screen = batch->screen;
968 screen->vtbl.load_register_mem32(batch, MI_PREDICATE_SRC0,
970 screen->vtbl.load_register_imm32(batch, MI_PREDICATE_SRC1, 0);
975 crocus_batch_emit(batch, &mi_predicate, sizeof(uint32_t));