Lines Matching defs:ureg
247 static void set_bad( struct ureg_program *ureg )
249 tokens_error(&ureg->domain[0]);
254 static union tgsi_any_token *get_tokens( struct ureg_program *ureg,
258 struct ureg_tokens *tokens = &ureg->domain[domain];
270 static union tgsi_any_token *retrieve_token( struct ureg_program *ureg,
274 if (ureg->domain[domain].tokens == error_tokens)
277 return &ureg->domain[domain].tokens[nr];
282 ureg_property(struct ureg_program *ureg, unsigned name, unsigned value)
284 assert(name < ARRAY_SIZE(ureg->properties));
285 ureg->properties[name] = value;
289 ureg_DECL_fs_input_centroid_layout(struct ureg_program *ureg,
304 for (i = 0; i < ureg->nr_inputs; i++) {
305 if (ureg->input[i].semantic_name == semantic_name &&
306 ureg->input[i].semantic_index == semantic_index) {
307 assert(ureg->input[i].interp == interp_mode);
308 assert(ureg->input[i].interp_location == interp_location);
309 if (ureg->input[i].array_id == array_id) {
310 ureg->input[i].usage_mask |= usage_mask;
311 ureg->input[i].last = MAX2(ureg->input[i].last, ureg->input[i].first + array_size - 1);
312 ureg->nr_input_regs = MAX2(ureg->nr_input_regs, ureg->input[i].last + 1);
315 assert((ureg->input[i].usage_mask & usage_mask) == 0);
319 if (ureg->nr_inputs < UREG_MAX_INPUT) {
321 ureg->input[i].semantic_name = semantic_name;
322 ureg->input[i].semantic_index = semantic_index;
323 ureg->input[i].interp = interp_mode;
324 ureg->input[i].interp_location = interp_location;
325 ureg->input[i].first = index;
326 ureg->input[i].last = index + array_size - 1;
327 ureg->input[i].array_id = array_id;
328 ureg->input[i].usage_mask = usage_mask;
329 ureg->nr_input_regs = MAX2(ureg->nr_input_regs, index + array_size);
330 ureg->nr_inputs++;
332 set_bad(ureg);
336 return ureg_src_array_register(TGSI_FILE_INPUT, ureg->input[i].first,
341 ureg_DECL_fs_input_centroid(struct ureg_program *ureg,
349 return ureg_DECL_fs_input_centroid_layout(ureg,
352 ureg->nr_input_regs, TGSI_WRITEMASK_XYZW, array_id, array_size);
357 ureg_DECL_vs_input( struct ureg_program *ureg,
360 assert(ureg->processor == PIPE_SHADER_VERTEX);
361 assert(index / 32 < ARRAY_SIZE(ureg->vs_inputs));
363 ureg->vs_inputs[index/32] |= 1 << (index % 32);
369 ureg_DECL_input_layout(struct ureg_program *ureg,
377 return ureg_DECL_fs_input_centroid_layout(ureg,
385 ureg_DECL_input(struct ureg_program *ureg,
391 return ureg_DECL_fs_input_centroid(ureg, semantic_name, semantic_index,
399 ureg_DECL_system_value(struct ureg_program *ureg,
405 for (i = 0; i < ureg->nr_system_values; i++) {
406 if (ureg->system_value[i].semantic_name == semantic_name &&
407 ureg->system_value[i].semantic_index == semantic_index) {
412 if (ureg->nr_system_values < UREG_MAX_SYSTEM_VALUE) {
413 ureg->system_value[ureg->nr_system_values].semantic_name = semantic_name;
414 ureg->system_value[ureg->nr_system_values].semantic_index = semantic_index;
415 i = ureg->nr_system_values;
416 ureg->nr_system_values++;
418 set_bad(ureg);
427 ureg_DECL_output_layout(struct ureg_program *ureg,
445 for (i = 0; i < ureg->nr_outputs; i++) {
446 if (ureg->output[i].semantic_name == semantic_name &&
447 ureg->output[i].semantic_index == semantic_index) {
448 if (ureg->output[i].array_id == array_id) {
449 ureg->output[i].usage_mask |= usage_mask;
450 ureg->output[i].last = MAX2(ureg->output[i].last, ureg->output[i].first + array_size - 1);
451 ureg->nr_output_regs = MAX2(ureg->nr_output_regs, ureg->output[i].last + 1);
454 assert((ureg->output[i].usage_mask & usage_mask) == 0);
458 if (ureg->nr_outputs < UREG_MAX_OUTPUT) {
459 ureg->output[i].semantic_name = semantic_name;
460 ureg->output[i].semantic_index = semantic_index;
461 ureg->output[i].usage_mask = usage_mask;
462 ureg->output[i].first = index;
463 ureg->output[i].last = index + array_size - 1;
464 ureg->output[i].array_id = array_id;
465 ureg->output[i].invariant = invariant;
466 ureg->nr_output_regs = MAX2(ureg->nr_output_regs, index + array_size);
467 ureg->nr_outputs++;
470 set_bad( ureg );
475 ureg->output[i].streams |= streams;
477 return ureg_dst_array_register(TGSI_FILE_OUTPUT, ureg->output[i].first,
483 ureg_DECL_output_masked(struct ureg_program *ureg,
490 return ureg_DECL_output_layout(ureg, name, index, 0,
491 ureg->nr_output_regs, usage_mask, array_id,
497 ureg_DECL_output(struct ureg_program *ureg,
501 return ureg_DECL_output_masked(ureg, name, index, TGSI_WRITEMASK_XYZW,
506 ureg_DECL_output_array(struct ureg_program *ureg,
512 return ureg_DECL_output_masked(ureg, semantic_name, semantic_index,
529 ureg_DECL_constant2D(struct ureg_program *ureg,
534 struct const_decl *decl = &ureg->const_decls[index2D];
553 ureg_DECL_constant(struct ureg_program *ureg,
556 struct const_decl *decl = &ureg->const_decls[0];
616 ureg_DECL_hw_atomic(struct ureg_program *ureg,
622 struct hw_atomic_decl *decl = &ureg->hw_atomic_decls[buffer_id];
631 set_bad(ureg);
635 static struct ureg_dst alloc_temporary( struct ureg_program *ureg,
642 for (i = util_bitmask_get_first_index(ureg->free_temps);
644 i = util_bitmask_get_next_index(ureg->free_temps, i + 1)) {
645 if (util_bitmask_get(ureg->local_temps, i) == local)
652 i = ureg->nr_temps++;
655 util_bitmask_set(ureg->local_temps, i);
658 if (!i || util_bitmask_get(ureg->local_temps, i - 1) != local)
659 util_bitmask_set(ureg->decl_temps, i);
662 util_bitmask_clear(ureg->free_temps, i);
667 struct ureg_dst ureg_DECL_temporary( struct ureg_program *ureg )
669 return alloc_temporary(ureg, FALSE);
672 struct ureg_dst ureg_DECL_local_temporary( struct ureg_program *ureg )
674 return alloc_temporary(ureg, TRUE);
677 struct ureg_dst ureg_DECL_array_temporary( struct ureg_program *ureg,
681 unsigned i = ureg->nr_temps;
685 util_bitmask_set(ureg->local_temps, i);
688 util_bitmask_set(ureg->decl_temps, i);
690 ureg->nr_temps += size;
693 util_bitmask_set(ureg->decl_temps, ureg->nr_temps);
695 if (ureg->nr_array_temps < UREG_MAX_ARRAY_TEMPS) {
696 ureg->array_temps[ureg->nr_array_temps++] = i;
697 dst.ArrayID = ureg->nr_array_temps;
703 void ureg_release_temporary( struct ureg_program *ureg,
707 util_bitmask_set(ureg->free_temps, tmp.Index);
713 struct ureg_dst ureg_DECL_address( struct ureg_program *ureg )
715 if (ureg->nr_addrs < UREG_MAX_ADDR)
716 return ureg_dst_register( TGSI_FILE_ADDRESS, ureg->nr_addrs++ );
724 struct ureg_src ureg_DECL_sampler( struct ureg_program *ureg,
729 for (i = 0; i < ureg->nr_samplers; i++)
730 if (ureg->sampler[i].Index == (int)nr)
731 return ureg->sampler[i];
734 ureg->sampler[i] = ureg_src_register( TGSI_FILE_SAMPLER, nr );
735 ureg->nr_samplers++;
736 return ureg->sampler[i];
740 return ureg->sampler[0];
747 ureg_DECL_sampler_view(struct ureg_program *ureg,
758 for (i = 0; i < ureg->nr_sampler_views; i++) {
759 if (ureg->sampler_view[i].index == index) {
765 ureg->sampler_view[i].index = index;
766 ureg->sampler_view[i].target = target;
767 ureg->sampler_view[i].return_type_x = return_type_x;
768 ureg->sampler_view[i].return_type_y = return_type_y;
769 ureg->sampler_view[i].return_type_z = return_type_z;
770 ureg->sampler_view[i].return_type_w = return_type_w;
771 ureg->nr_sampler_views++;
782 ureg_DECL_image(struct ureg_program *ureg,
792 for (i = 0; i < ureg->nr_images; i++)
793 if (ureg->image[i].index == index)
797 ureg->image[i].index = index;
798 ureg->image[i].target = target;
799 ureg->image[i].wr = wr;
800 ureg->image[i].raw = raw;
801 ureg->image[i].format = format;
802 ureg->nr_images++;
812 struct ureg_src ureg_DECL_buffer(struct ureg_program *ureg, unsigned nr,
818 for (i = 0; i < ureg->nr_buffers; i++)
819 if (ureg->buffer[i].index == nr)
823 ureg->buffer[i].index = nr;
824 ureg->buffer[i].atomic = atomic;
825 ureg->nr_buffers++;
835 struct ureg_src ureg_DECL_memory(struct ureg_program *ureg,
840 ureg->use_memory[memory_type] = true;
930 decl_immediate( struct ureg_program *ureg,
942 for (i = 0; i < ureg->nr_immediates; i++) {
943 if (ureg->immediate[i].type != type) {
949 ureg->immediate[i].value.u,
950 &ureg->immediate[i].nr,
956 if (ureg->nr_immediates < UREG_MAX_IMMEDIATE) {
957 i = ureg->nr_immediates++;
958 ureg->immediate[i].type = type;
962 ureg->immediate[i].value.u,
963 &ureg->immediate[i].nr,
969 set_bad(ureg);
995 ureg_DECL_immediate( struct ureg_program *ureg,
1009 return decl_immediate(ureg, fu.u, nr, TGSI_IMM_FLOAT32);
1013 ureg_DECL_immediate_f64( struct ureg_program *ureg,
1028 return decl_immediate(ureg, fu.u, nr, TGSI_IMM_FLOAT64);
1032 ureg_DECL_immediate_uint( struct ureg_program *ureg,
1036 return decl_immediate(ureg, v, nr, TGSI_IMM_UINT32);
1041 ureg_DECL_immediate_block_uint( struct ureg_program *ureg,
1048 if (ureg->nr_immediates + (nr + 3) / 4 > UREG_MAX_IMMEDIATE) {
1049 set_bad(ureg);
1053 index = ureg->nr_immediates;
1054 ureg->nr_immediates += (nr + 3) / 4;
1056 for (i = index; i < ureg->nr_immediates; i++) {
1057 ureg->immediate[i].type = TGSI_IMM_UINT32;
1058 ureg->immediate[i].nr = nr > 4 ? 4 : nr;
1059 memcpy(ureg->immediate[i].value.u,
1061 ureg->immediate[i].nr * sizeof(uint));
1070 ureg_DECL_immediate_int( struct ureg_program *ureg,
1074 return decl_immediate(ureg, (const unsigned *)v, nr, TGSI_IMM_INT32);
1078 ureg_DECL_immediate_uint64( struct ureg_program *ureg,
1093 return decl_immediate(ureg, fu.u, nr, TGSI_IMM_UINT64);
1097 ureg_DECL_immediate_int64( struct ureg_program *ureg,
1112 return decl_immediate(ureg, fu.u, nr, TGSI_IMM_INT64);
1116 ureg_emit_src( struct ureg_program *ureg,
1122 union tgsi_any_token *out = get_tokens( ureg, DOMAIN_INSN, size );
1145 if (!ureg->supports_any_inout_decl_range &&
1165 if (!ureg->supports_any_inout_decl_range &&
1182 ureg_emit_dst( struct ureg_program *ureg,
1188 union tgsi_any_token *out = get_tokens( ureg, DOMAIN_INSN, size );
1209 if (!ureg->supports_any_inout_decl_range &&
1229 if (!ureg->supports_any_inout_decl_range &&
1260 ureg_emit_insn(struct ureg_program *ureg,
1273 out = get_tokens( ureg, DOMAIN_INSN, count );
1277 out[0].insn.Precise = precise || ureg->precise;
1281 result.insn_token = ureg->domain[DOMAIN_INSN].count - count;
1284 ureg->nr_instructions++;
1297 ureg_emit_label(struct ureg_program *ureg,
1306 out = get_tokens( ureg, DOMAIN_INSN, 1 );
1309 insn = retrieve_token( ureg, DOMAIN_INSN, extended_token );
1312 *label_token = ureg->domain[DOMAIN_INSN].count - 1;
1319 ureg_get_instruction_number( struct ureg_program *ureg )
1321 return ureg->nr_instructions;
1328 ureg_fixup_label(struct ureg_program *ureg,
1332 union tgsi_any_token *out = retrieve_token( ureg, DOMAIN_INSN, label_token );
1339 ureg_emit_texture(struct ureg_program *ureg,
1346 out = get_tokens( ureg, DOMAIN_INSN, 1 );
1347 insn = retrieve_token( ureg, DOMAIN_INSN, extended_token );
1358 ureg_emit_texture_offset(struct ureg_program *ureg,
1363 out = get_tokens( ureg, DOMAIN_INSN, 1);
1370 ureg_emit_memory(struct ureg_program *ureg,
1378 out = get_tokens( ureg, DOMAIN_INSN, 1 );
1379 insn = retrieve_token( ureg, DOMAIN_INSN, extended_token );
1390 ureg_fixup_insn_size(struct ureg_program *ureg,
1393 union tgsi_any_token *out = retrieve_token( ureg, DOMAIN_INSN, insn );
1396 out->insn.NrTokens = ureg->domain[DOMAIN_INSN].count - insn - 1;
1401 ureg_insn(struct ureg_program *ureg,
1419 insn = ureg_emit_insn(ureg,
1427 ureg_emit_dst( ureg, dst[i] );
1430 ureg_emit_src( ureg, src[i] );
1432 ureg_fixup_insn_size( ureg, insn.insn_token );
1436 ureg_tex_insn(struct ureg_program *ureg,
1457 insn = ureg_emit_insn(ureg,
1464 ureg_emit_texture( ureg, insn.extended_token, target, return_type,
1468 ureg_emit_texture_offset( ureg, &texoffsets[i]);
1471 ureg_emit_dst( ureg, dst[i] );
1474 ureg_emit_src( ureg, src[i] );
1476 ureg_fixup_insn_size( ureg, insn.insn_token );
1481 ureg_memory_insn(struct ureg_program *ureg,
1494 insn = ureg_emit_insn(ureg,
1501 ureg_emit_memory(ureg, insn.extended_token, qualifier, texture, format);
1504 ureg_emit_dst(ureg, dst[i]);
1507 ureg_emit_src(ureg, src[i]);
1509 ureg_fixup_insn_size(ureg, insn.insn_token);
1514 emit_decl_semantic(struct ureg_program *ureg,
1525 union tgsi_any_token *out = get_tokens(ureg, DOMAIN_DECL, array_id ? 4 : 3);
1555 emit_decl_atomic_2d(struct ureg_program *ureg,
1561 union tgsi_any_token *out = get_tokens(ureg, DOMAIN_DECL, array_id ? 4 : 3);
1585 emit_decl_fs(struct ureg_program *ureg,
1596 union tgsi_any_token *out = get_tokens(ureg, DOMAIN_DECL,
1627 emit_decl_temps( struct ureg_program *ureg,
1632 union tgsi_any_token *out = get_tokens( ureg, DOMAIN_DECL,
1653 static void emit_decl_range( struct ureg_program *ureg,
1658 union tgsi_any_token *out = get_tokens( ureg, DOMAIN_DECL, 2 );
1673 emit_decl_range2D(struct ureg_program *ureg,
1679 union tgsi_any_token *out = get_tokens(ureg, DOMAIN_DECL, 3);
1697 emit_decl_sampler_view(struct ureg_program *ureg,
1705 union tgsi_any_token *out = get_tokens(ureg, DOMAIN_DECL, 3);
1726 emit_decl_image(struct ureg_program *ureg,
1733 union tgsi_any_token *out = get_tokens(ureg, DOMAIN_DECL, 3);
1753 emit_decl_buffer(struct ureg_program *ureg,
1757 union tgsi_any_token *out = get_tokens(ureg, DOMAIN_DECL, 2);
1772 emit_decl_memory(struct ureg_program *ureg, unsigned memory_type)
1774 union tgsi_any_token *out = get_tokens(ureg, DOMAIN_DECL, 2);
1789 emit_immediate( struct ureg_program *ureg,
1793 union tgsi_any_token *out = get_tokens( ureg, DOMAIN_DECL, 5 );
1808 emit_property(struct ureg_program *ureg,
1812 union tgsi_any_token *out = get_tokens(ureg, DOMAIN_DECL, 2);
1846 static void emit_decls( struct ureg_program *ureg )
1850 for (i = 0; i < ARRAY_SIZE(ureg->properties); i++)
1851 if (ureg->properties[i] != ~0u)
1852 emit_property(ureg, i, ureg->properties[i]);
1857 qsort(ureg->input, ureg->nr_inputs, sizeof(ureg->input[0]), input_sort);
1859 if (ureg->processor == PIPE_SHADER_VERTEX) {
1861 if (ureg->vs_inputs[i/32] & (1u << (i%32))) {
1862 emit_decl_range( ureg, TGSI_FILE_INPUT, i, 1 );
1865 } else if (ureg->processor == PIPE_SHADER_FRAGMENT) {
1866 if (ureg->supports_any_inout_decl_range) {
1867 for (i = 0; i < ureg->nr_inputs; i++) {
1868 emit_decl_fs(ureg,
1870 ureg->input[i].first,
1871 ureg->input[i].last,
1872 ureg->input[i].semantic_name,
1873 ureg->input[i].semantic_index,
1874 ureg->input[i].interp,
1875 ureg->input[i].interp_location,
1876 ureg->input[i].array_id,
1877 ureg->input[i].usage_mask);
1881 for (i = 0; i < ureg->nr_inputs; i++) {
1882 for (j = ureg->input[i].first; j <= ureg->input[i].last; j++) {
1883 emit_decl_fs(ureg,
1886 ureg->input[i].semantic_name,
1887 ureg->input[i].semantic_index +
1888 (j - ureg->input[i].first),
1889 ureg->input[i].interp,
1890 ureg->input[i].interp_location, 0,
1891 ureg->input[i].usage_mask);
1896 if (ureg->supports_any_inout_decl_range) {
1897 for (i = 0; i < ureg->nr_inputs; i++) {
1898 emit_decl_semantic(ureg,
1900 ureg->input[i].first,
1901 ureg->input[i].last,
1902 ureg->input[i].semantic_name,
1903 ureg->input[i].semantic_index,
1906 ureg->input[i].array_id,
1911 for (i = 0; i < ureg->nr_inputs; i++) {
1912 for (j = ureg->input[i].first; j <= ureg->input[i].last; j++) {
1913 emit_decl_semantic(ureg,
1916 ureg->input[i].semantic_name,
1917 ureg->input[i].semantic_index +
1918 (j - ureg->input[i].first),
1926 for (i = 0; i < ureg->nr_system_values; i++) {
1927 emit_decl_semantic(ureg,
1931 ureg->system_value[i].semantic_name,
1932 ureg->system_value[i].semantic_index,
1940 qsort(ureg->output, ureg->nr_outputs, sizeof(ureg->output[0]), output_sort);
1942 if (ureg->supports_any_inout_decl_range) {
1943 for (i = 0; i < ureg->nr_outputs; i++) {
1944 emit_decl_semantic(ureg,
1946 ureg->output[i].first,
1947 ureg->output[i].last,
1948 ureg->output[i].semantic_name,
1949 ureg->output[i].semantic_index,
1950 ureg->output[i].streams,
1951 ureg->output[i].usage_mask,
1952 ureg->output[i].array_id,
1953 ureg->output[i].invariant);
1957 for (i = 0; i < ureg->nr_outputs; i++) {
1958 for (j = ureg->output[i].first; j <= ureg->output[i].last; j++) {
1959 emit_decl_semantic(ureg,
1962 ureg->output[i].semantic_name,
1963 ureg->output[i].semantic_index +
1964 (j - ureg->output[i].first),
1965 ureg->output[i].streams,
1966 ureg->output[i].usage_mask,
1968 ureg->output[i].invariant);
1973 for (i = 0; i < ureg->nr_samplers; i++) {
1974 emit_decl_range( ureg,
1976 ureg->sampler[i].Index, 1 );
1979 for (i = 0; i < ureg->nr_sampler_views; i++) {
1980 emit_decl_sampler_view(ureg,
1981 ureg->sampler_view[i].index,
1982 ureg->sampler_view[i].target,
1983 ureg->sampler_view[i].return_type_x,
1984 ureg->sampler_view[i].return_type_y,
1985 ureg->sampler_view[i].return_type_z,
1986 ureg->sampler_view[i].return_type_w);
1989 for (i = 0; i < ureg->nr_images; i++) {
1990 emit_decl_image(ureg,
1991 ureg->image[i].index,
1992 ureg->image[i].target,
1993 ureg->image[i].format,
1994 ureg->image[i].wr,
1995 ureg->image[i].raw);
1998 for (i = 0; i < ureg->nr_buffers; i++) {
1999 emit_decl_buffer(ureg, ureg->buffer[i].index, ureg->buffer[i].atomic);
2003 if (ureg->use_memory[i])
2004 emit_decl_memory(ureg, i);
2008 struct const_decl *decl = &ureg->const_decls[i];
2014 emit_decl_range2D(ureg,
2024 struct hw_atomic_decl *decl = &ureg->hw_atomic_decls[i];
2035 emit_decl_atomic_2d(ureg,
2044 if (ureg->nr_temps) {
2046 for (i = 0; i < ureg->nr_temps;) {
2047 boolean local = util_bitmask_get(ureg->local_temps, i);
2049 i = util_bitmask_get_next_index(ureg->decl_temps, i + 1);
2051 i = ureg->nr_temps;
2053 if (array < ureg->nr_array_temps && ureg->array_temps[array] == first)
2054 emit_decl_temps( ureg, first, i - 1, local, ++array );
2056 emit_decl_temps( ureg, first, i - 1, local, 0 );
2060 if (ureg->nr_addrs) {
2061 emit_decl_range( ureg,
2063 0, ureg->nr_addrs );
2066 for (i = 0; i < ureg->nr_immediates; i++) {
2067 emit_immediate( ureg,
2068 ureg->immediate[i].value.u,
2069 ureg->immediate[i].type );
2076 static void copy_instructions( struct ureg_program *ureg )
2078 unsigned nr_tokens = ureg->domain[DOMAIN_INSN].count;
2079 union tgsi_any_token *out = get_tokens( ureg,
2084 ureg->domain[DOMAIN_INSN].tokens,
2090 fixup_header_size(struct ureg_program *ureg)
2092 union tgsi_any_token *out = retrieve_token( ureg, DOMAIN_DECL, 0 );
2094 out->header.BodySize = ureg->domain[DOMAIN_DECL].count - 2;
2099 emit_header( struct ureg_program *ureg )
2101 union tgsi_any_token *out = get_tokens( ureg, DOMAIN_DECL, 2 );
2106 out[1].processor.Processor = ureg->processor;
2111 const struct tgsi_token *ureg_finalize( struct ureg_program *ureg )
2115 switch (ureg->processor) {
2118 ureg_property(ureg, TGSI_PROPERTY_NEXT_SHADER,
2119 ureg->next_shader_processor == -1 ?
2121 ureg->next_shader_processor);
2127 emit_header( ureg );
2128 emit_decls( ureg );
2129 copy_instructions( ureg );
2130 fixup_header_size( ureg );
2132 if (ureg->domain[0].tokens == error_tokens ||
2133 ureg->domain[1].tokens == error_tokens) {
2139 tokens = &ureg->domain[DOMAIN_DECL].tokens[0].token;
2143 ureg->domain[DOMAIN_DECL].count);
2150 for (unsigned i = 0; i < ARRAY_SIZE(ureg->const_decls); i++) {
2151 for (unsigned j = 0; j < ureg->const_decls[i].nr_constant_ranges; j++) {
2152 if (ureg->const_decls[i].constant_range[j].last > 4096) {
2171 void *ureg_create_shader( struct ureg_program *ureg,
2177 pipe_shader_state_from_tgsi(&state, ureg_finalize(ureg));
2184 switch (ureg->processor) {
2201 const struct tgsi_token *ureg_get_tokens( struct ureg_program *ureg,
2206 ureg_finalize(ureg);
2208 tokens = &ureg->domain[DOMAIN_DECL].tokens[0].token;
2211 *nr_tokens = ureg->domain[DOMAIN_DECL].count;
2213 ureg->domain[DOMAIN_DECL].tokens = NULL;
2214 ureg->domain[DOMAIN_DECL].size = 0;
2215 ureg->domain[DOMAIN_DECL].order = 0;
2216 ureg->domain[DOMAIN_DECL].count = 0;
2240 struct ureg_program *ureg = CALLOC_STRUCT( ureg_program );
2241 if (!ureg)
2244 ureg->processor = processor;
2245 ureg->supports_any_inout_decl_range =
2249 ureg->next_shader_processor = -1;
2251 for (i = 0; i < ARRAY_SIZE(ureg->properties); i++)
2252 ureg->properties[i] = ~0;
2254 ureg->free_temps = util_bitmask_create();
2255 if (ureg->free_temps == NULL)
2258 ureg->local_temps = util_bitmask_create();
2259 if (ureg->local_temps == NULL)
2262 ureg->decl_temps = util_bitmask_create();
2263 if (ureg->decl_temps == NULL)
2266 return ureg;
2269 util_bitmask_destroy(ureg->local_temps);
2271 util_bitmask_destroy(ureg->free_temps);
2273 FREE(ureg);
2280 ureg_set_next_shader_processor(struct ureg_program *ureg, unsigned processor)
2282 ureg->next_shader_processor = processor;
2287 ureg_get_nr_outputs( const struct ureg_program *ureg )
2289 if (!ureg)
2291 return ureg->nr_outputs;
2295 ureg_setup_clipdist_info(struct ureg_program *ureg,
2299 ureg_property(ureg, TGSI_PROPERTY_NUM_CLIPDIST_ENABLED,
2302 ureg_property(ureg, TGSI_PROPERTY_NUM_CULLDIST_ENABLED,
2307 ureg_setup_tess_ctrl_shader(struct ureg_program *ureg,
2310 ureg_property(ureg, TGSI_PROPERTY_TCS_VERTICES_OUT,
2315 ureg_setup_tess_eval_shader(struct ureg_program *ureg,
2318 ureg_property(ureg, TGSI_PROPERTY_TES_PRIM_MODE, u_tess_prim_from_shader(info->tess._primitive_mode));
2326 ureg_property(ureg, TGSI_PROPERTY_TES_SPACING,
2329 ureg_property(ureg, TGSI_PROPERTY_TES_VERTEX_ORDER_CW,
2331 ureg_property(ureg, TGSI_PROPERTY_TES_POINT_MODE,
2336 ureg_setup_geometry_shader(struct ureg_program *ureg,
2339 ureg_property(ureg, TGSI_PROPERTY_GS_INPUT_PRIM,
2341 ureg_property(ureg, TGSI_PROPERTY_GS_OUTPUT_PRIM,
2343 ureg_property(ureg, TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES,
2345 ureg_property(ureg, TGSI_PROPERTY_GS_INVOCATIONS,
2350 ureg_setup_fragment_shader(struct ureg_program *ureg,
2354 ureg_property(ureg, TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL, 1);
2357 ureg_property(ureg, TGSI_PROPERTY_FS_POST_DEPTH_COVERAGE, 1);
2363 ureg_property(ureg, TGSI_PROPERTY_FS_DEPTH_LAYOUT,
2367 ureg_property(ureg, TGSI_PROPERTY_FS_DEPTH_LAYOUT,
2371 ureg_property(ureg, TGSI_PROPERTY_FS_DEPTH_LAYOUT,
2375 ureg_property(ureg, TGSI_PROPERTY_FS_DEPTH_LAYOUT,
2384 ureg_property(ureg, TGSI_PROPERTY_FS_BLEND_EQUATION_ADVANCED,
2390 ureg_setup_compute_shader(struct ureg_program *ureg,
2393 ureg_property(ureg, TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH,
2395 ureg_property(ureg, TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT,
2397 ureg_property(ureg, TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH,
2401 ureg_DECL_memory(ureg, TGSI_MEMORY_TYPE_SHARED);
2405 ureg_setup_shader_info(struct ureg_program *ureg,
2409 ureg_property(ureg, TGSI_PROPERTY_LAYER_VIEWPORT_RELATIVE, 1);
2413 ureg_setup_clipdist_info(ureg, info);
2414 ureg_set_next_shader_processor(ureg, pipe_shader_type_from_mesa(info->next_stage));
2417 ureg_setup_tess_ctrl_shader(ureg, info);
2420 ureg_setup_tess_eval_shader(ureg, info);
2421 ureg_setup_clipdist_info(ureg, info);
2422 ureg_set_next_shader_processor(ureg, pipe_shader_type_from_mesa(info->next_stage));
2425 ureg_setup_geometry_shader(ureg, info);
2426 ureg_setup_clipdist_info(ureg, info);
2429 ureg_setup_fragment_shader(ureg, info);
2432 ureg_setup_compute_shader(ureg, info);
2440 void ureg_destroy( struct ureg_program *ureg )
2444 for (i = 0; i < ARRAY_SIZE(ureg->domain); i++) {
2445 if (ureg->domain[i].tokens &&
2446 ureg->domain[i].tokens != error_tokens)
2447 FREE(ureg->domain[i].tokens);
2450 util_bitmask_destroy(ureg->free_temps);
2451 util_bitmask_destroy(ureg->local_temps);
2452 util_bitmask_destroy(ureg->decl_temps);
2454 FREE(ureg);
2457 void ureg_set_precise( struct ureg_program *ureg, bool precise )
2459 ureg->precise = precise;