Lines Matching refs:index
990 print_temp(const struct tgsi_exec_machine *mach, uint index)
992 const struct tgsi_exec_vector *tmp = &mach->Temps[index];
994 debug_printf("Temp[%u] =\n", index);
1393 const union tgsi_exec_channel *index,
1406 const unsigned pos = index->i[i] * 4 + swizzle;
1413 debug_printf("TGSI Exec: const buffer index %d"
1429 index2D->i[i] * TGSI_EXEC_MAX_INPUT_ATTRIBS + index->i[i],
1430 index2D->i[i], index->i[i]);
1432 int pos = index2D->i[i] * TGSI_EXEC_MAX_INPUT_ATTRIBS + index->i[i];
1441 chan->u[i] = mach->SystemValue[index->i[i]].xyzw[swizzle].u[i];
1447 assert(index->i[i] < TGSI_EXEC_NUM_TEMPS);
1450 chan->u[i] = mach->Temps[index->i[i]].xyzw[swizzle].u[i];
1456 assert(index->i[i] >= 0 && index->i[i] < (int)mach->ImmLimit);
1459 chan->f[i] = mach->Imms[index->i[i]][swizzle];
1465 assert(index->i[i] >= 0 && index->i[i] < ARRAY_SIZE(mach->Addrs));
1468 chan->u[i] = mach->Addrs[index->i[i]].xyzw[swizzle].u[i];
1475 assert(index->i[i] >= 0);
1478 chan->u[i] = mach->Outputs[index->i[i]].xyzw[swizzle].u[i];
1493 union tgsi_exec_channel *index,
1496 /* We start with a direct index into a register file.
1503 index->i[0] =
1504 index->i[1] =
1505 index->i[2] =
1506 index->i[3] = reg->Register.Index;
1509 * a register file. The direct index now becomes an offset
1524 index->i[i] += addr->u[i];
1526 /* for disabled execution channels, zero-out the index to
1531 index->i[i] = 0;
1549 /* Again, the second subscript index can be addressed indirectly
1568 /* for disabled execution channels, zero-out the index to
1597 union tgsi_exec_channel index;
1601 get_index_registers(mach, reg, &index, &index2D);
1608 &index,
1645 int index;
1649 * a register file. The direct index now becomes an offset
1659 union tgsi_exec_channel index;
1664 index.i[0] =
1665 index.i[1] =
1666 index.i[2] =
1667 index.i[3] = reg->Indirect.Index;
1676 &index,
1690 index = mach->OutputVertexOffset + reg->Register.Index;
1691 dst = &mach->Outputs[offset + index].xyzw[chan_index];
1697 debug_printf("STORING OUT[%d] mask(%d), = (", offset + index, execmask);
1707 index = reg->Register.Index;
1708 assert( index < TGSI_EXEC_NUM_TEMPS );
1709 dst = &mach->Temps[offset + index].xyzw[chan_index];
1713 index = reg->Register.Index;
1714 assert(index >= 0 && index < ARRAY_SIZE(mach->Addrs));
1715 dst = &mach->Addrs[index].xyzw[chan_index];
1948 union tgsi_exec_channel index;
1950 index.i[0] = index.i[1] = index.i[2] = index.i[3] = inst->TexOffsets[0].Index;
1952 inst->TexOffsets[0].SwizzleX, &index, &ZeroVec, &offset[0]);
1954 inst->TexOffsets[0].SwizzleY, &index, &ZeroVec, &offset[1]);
1956 inst->TexOffsets[0].SwizzleZ, &index, &ZeroVec, &offset[2]);
4813 union tgsi_exec_channel index;
4821 get_index_registers(mach, reg, &index, &index2D);
4829 fetch_src_file_channel(mach, TGSI_FILE_INPUT, chan, &index, &index2D,
4837 unsigned pos = index2D.i[chan] * TGSI_EXEC_MAX_INPUT_ATTRIBS + index.i[chan];
4851 union tgsi_exec_channel index;
4859 get_index_registers(mach, reg, &index, &index2D);
4860 unsigned pos = index2D.i[0] * TGSI_EXEC_MAX_INPUT_ATTRIBS + index.i[0];
4869 fetch_src_file_channel(mach, TGSI_FILE_INPUT, chan, &index, &index2D, &result);
4880 union tgsi_exec_channel index;
4886 get_index_registers(mach, reg, &index, &index2D);
4905 fetch_src_file_channel(mach, TGSI_FILE_INPUT, chan, &index, &index2D,