Lines Matching defs:inst
1749 const struct tgsi_full_instruction *inst,
1760 if (!inst->Instruction.Saturate) {
1773 fetch_source(mach, VAL, &inst->Src[INDEX], CHAN, TGSI_EXEC_DATA_FLOAT)
1776 fetch_source(mach, VAL, &inst->Src[INDEX], CHAN, TGSI_EXEC_DATA_INT)
1785 const struct tgsi_full_instruction *inst)
1802 &inst->Src[0],
1836 const struct tgsi_full_instruction *inst)
1862 const struct tgsi_full_instruction *inst)
1872 if (inst) {
1944 const struct tgsi_full_instruction *inst,
1947 if (inst->Texture.NumOffsets == 1) {
1950 index.i[0] = index.i[1] = index.i[2] = index.i[3] = inst->TexOffsets[0].Index;
1951 fetch_src_file_channel(mach, inst->TexOffsets[0].File,
1952 inst->TexOffsets[0].SwizzleX, &index, &ZeroVec, &offset[0]);
1953 fetch_src_file_channel(mach, inst->TexOffsets[0].File,
1954 inst->TexOffsets[0].SwizzleY, &index, &ZeroVec, &offset[1]);
1955 fetch_src_file_channel(mach, inst->TexOffsets[0].File,
1956 inst->TexOffsets[0].SwizzleZ, &index, &ZeroVec, &offset[2]);
1961 assert(inst->Texture.NumOffsets == 0);
1973 const struct tgsi_full_instruction *inst,
1993 const struct tgsi_full_instruction *inst,
1998 if (inst->Src[sampler].Register.Indirect) {
1999 const struct tgsi_full_src_register *reg = &inst->Src[sampler];
2015 unit = inst->Src[sampler].Register.Index + indir_index.i[i];
2021 unit = inst->Src[sampler].Register.Index;
2035 const struct tgsi_full_instruction *inst,
2046 unit = fetch_sampler_unit(mach, inst, sampler);
2048 fetch_texel_offsets(mach, inst, offsets);
2051 assert(inst->Texture.Texture != TGSI_TEXTURE_BUFFER);
2053 dim = tgsi_util_get_texture_coord_dim(inst->Texture.Texture);
2054 shadow_ref = tgsi_util_get_shadow_ref_src_index(inst->Texture.Texture);
2134 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2135 store_dest(mach, &r[chan], &inst->Dst[0], inst, chan);
2142 const struct tgsi_full_instruction *inst)
2151 resource_unit = fetch_sampler_unit(mach, inst, 1);
2152 if (inst->Instruction.Opcode == TGSI_OPCODE_LOD) {
2155 sampler_unit = fetch_sampler_unit(mach, inst, 2);
2157 dim = tgsi_util_get_texture_coord_dim(inst->Texture.Texture);
2178 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
2179 store_dest(mach, &r[0], &inst->Dst[0], inst, TGSI_CHAN_X);
2181 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
2182 store_dest(mach, &r[1], &inst->Dst[0], inst, TGSI_CHAN_Y);
2184 if (inst->Instruction.Opcode == TGSI_OPCODE_LOD) {
2187 swizzles[0] = inst->Src[1].Register.SwizzleX;
2188 swizzles[1] = inst->Src[1].Register.SwizzleY;
2189 swizzles[2] = inst->Src[1].Register.SwizzleZ;
2190 swizzles[3] = inst->Src[1].Register.SwizzleW;
2193 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2196 &inst->Dst[0], inst, chan);
2199 &inst->Dst[0], inst, chan);
2204 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
2205 store_dest(mach, &r[0], &inst->Dst[0], inst, TGSI_CHAN_X);
2207 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
2208 store_dest(mach, &r[1], &inst->Dst[0], inst, TGSI_CHAN_Y);
2215 const struct tgsi_full_instruction *inst)
2223 unit = fetch_sampler_unit(mach, inst, 3);
2225 fetch_texel_offsets(mach, inst, offsets);
2227 switch (inst->Texture.Texture) {
2231 fetch_assign_deriv_channel(mach, inst, 1, TGSI_CHAN_X, derivs[0]);
2247 fetch_assign_deriv_channel(mach, inst, 1, TGSI_CHAN_X, derivs[0]);
2260 fetch_assign_deriv_channel(mach, inst, 1, TGSI_CHAN_X, derivs[0]);
2261 fetch_assign_deriv_channel(mach, inst, 1, TGSI_CHAN_Y, derivs[1]);
2280 fetch_assign_deriv_channel(mach, inst, 1, TGSI_CHAN_X, derivs[0]);
2281 fetch_assign_deriv_channel(mach, inst, 1, TGSI_CHAN_Y, derivs[1]);
2299 fetch_assign_deriv_channel(mach, inst, 1, TGSI_CHAN_X, derivs[0]);
2300 fetch_assign_deriv_channel(mach, inst, 1, TGSI_CHAN_Y, derivs[1]);
2301 fetch_assign_deriv_channel(mach, inst, 1, TGSI_CHAN_Z, derivs[2]);
2314 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2315 store_dest(mach, &r[chan], &inst->Dst[0], inst, chan);
2323 const struct tgsi_full_instruction *inst)
2333 unit = fetch_sampler_unit(mach, inst, 1);
2335 fetch_texel_offsets(mach, inst, offsets);
2339 if (inst->Instruction.Opcode == TGSI_OPCODE_SAMPLE_I ||
2340 inst->Instruction.Opcode == TGSI_OPCODE_SAMPLE_I_MS) {
2344 target = inst->Texture.Texture;
2382 if (inst->Instruction.Opcode == TGSI_OPCODE_SAMPLE_I ||
2383 inst->Instruction.Opcode == TGSI_OPCODE_SAMPLE_I_MS) {
2385 swizzles[0] = inst->Src[1].Register.SwizzleX;
2386 swizzles[1] = inst->Src[1].Register.SwizzleY;
2387 swizzles[2] = inst->Src[1].Register.SwizzleZ;
2388 swizzles[3] = inst->Src[1].Register.SwizzleW;
2391 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2393 &inst->Dst[0], inst, chan);
2399 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2400 store_dest(mach, &r[chan], &inst->Dst[0], inst, chan);
2408 const struct tgsi_full_instruction *inst)
2416 unit = fetch_sampler_unit(mach, inst, 1);
2418 fetch_source(mach, &src, &inst->Src[0], TGSI_CHAN_X, TGSI_EXEC_DATA_INT);
2430 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2431 store_dest(mach, &r[chan], &inst->Dst[0], inst, chan);
2438 const struct tgsi_full_instruction *inst,
2441 const uint resource_unit = inst->Src[1].Register.Index;
2442 const uint sampler_unit = inst->Src[2].Register.Index;
2451 fetch_texel_offsets(mach, inst, offsets);
2557 swizzles[0] = inst->Src[1].Register.SwizzleX;
2558 swizzles[1] = inst->Src[1].Register.SwizzleY;
2559 swizzles[2] = inst->Src[1].Register.SwizzleZ;
2560 swizzles[3] = inst->Src[1].Register.SwizzleW;
2563 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2565 &inst->Dst[0], inst, chan);
2572 const struct tgsi_full_instruction *inst)
2574 const uint resource_unit = inst->Src[1].Register.Index;
2575 const uint sampler_unit = inst->Src[2].Register.Index;
2583 fetch_texel_offsets(mach, inst, offsets);
2593 fetch_assign_deriv_channel(mach, inst, 3, TGSI_CHAN_X, derivs[0]);
2608 fetch_assign_deriv_channel(mach, inst, 3, TGSI_CHAN_X, derivs[0]);
2609 fetch_assign_deriv_channel(mach, inst, 3, TGSI_CHAN_Y, derivs[1]);
2625 fetch_assign_deriv_channel(mach, inst, 3, TGSI_CHAN_X, derivs[0]);
2626 fetch_assign_deriv_channel(mach, inst, 3, TGSI_CHAN_Y, derivs[1]);
2627 fetch_assign_deriv_channel(mach, inst, 3, TGSI_CHAN_Z, derivs[2]);
2639 swizzles[0] = inst->Src[1].Register.SwizzleX;
2640 swizzles[1] = inst->Src[1].Register.SwizzleY;
2641 swizzles[2] = inst->Src[1].Register.SwizzleZ;
2642 swizzles[3] = inst->Src[1].Register.SwizzleW;
2645 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2647 &inst->Dst[0], inst, chan);
2871 const struct tgsi_full_instruction *inst,
2879 fetch_source(mach, &src, &inst->Src[0], TGSI_CHAN_X, src_datatype);
2882 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2883 store_dest(mach, &dst, &inst->Dst[0], inst, chan);
2890 const struct tgsi_full_instruction *inst,
2898 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2901 fetch_source(mach, &src, &inst->Src[0], chan, src_datatype);
2906 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2907 store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan);
2918 const struct tgsi_full_instruction *inst,
2926 fetch_source(mach, &src[0], &inst->Src[0], TGSI_CHAN_X, src_datatype);
2927 fetch_source(mach, &src[1], &inst->Src[1], TGSI_CHAN_X, src_datatype);
2930 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2931 store_dest(mach, &dst, &inst->Dst[0], inst, chan);
2938 const struct tgsi_full_instruction *inst,
2946 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2949 fetch_source(mach, &src[0], &inst->Src[0], chan, src_datatype);
2950 fetch_source(mach, &src[1], &inst->Src[1], chan, src_datatype);
2955 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2956 store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan);
2968 const struct tgsi_full_instruction *inst,
2976 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2979 fetch_source(mach, &src[0], &inst->Src[0], chan, src_datatype);
2980 fetch_source(mach, &src[1], &inst->Src[1], chan, src_datatype);
2981 fetch_source(mach, &src[2], &inst->Src[2], chan, src_datatype);
2986 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2987 store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan);
3000 const struct tgsi_full_instruction *inst,
3008 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
3011 fetch_source(mach, &src[0], &inst->Src[0], chan, src_datatype);
3012 fetch_source(mach, &src[1], &inst->Src[1], chan, src_datatype);
3013 fetch_source(mach, &src[2], &inst->Src[2], chan, src_datatype);
3014 fetch_source(mach, &src[3], &inst->Src[3], chan, src_datatype);
3019 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
3020 store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan);
3027 const struct tgsi_full_instruction *inst)
3032 fetch_source(mach, &arg[0], &inst->Src[0], TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
3033 fetch_source(mach, &arg[1], &inst->Src[1], TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
3037 fetch_source(mach, &arg[0], &inst->Src[0], chan, TGSI_EXEC_DATA_FLOAT);
3038 fetch_source(mach, &arg[1], &inst->Src[1], chan, TGSI_EXEC_DATA_FLOAT);
3043 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
3044 store_dest(mach, &arg[2], &inst->Dst[0], inst, chan);
3051 const struct tgsi_full_instruction *inst)
3056 fetch_source(mach, &arg[0], &inst->Src[0], TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
3057 fetch_source(mach, &arg[1], &inst->Src[1], TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
3061 fetch_source(mach, &arg[0], &inst->Src[0], chan, TGSI_EXEC_DATA_FLOAT);
3062 fetch_source(mach, &arg[1], &inst->Src[1], chan, TGSI_EXEC_DATA_FLOAT);
3067 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
3068 store_dest(mach, &arg[2], &inst->Dst[0], inst, chan);
3075 const struct tgsi_full_instruction *inst)
3080 fetch_source(mach, &arg[0], &inst->Src[0], TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
3081 fetch_source(mach, &arg[1], &inst->Src[1], TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
3084 fetch_source(mach, &arg[0], &inst->Src[0], TGSI_CHAN_Y, TGSI_EXEC_DATA_FLOAT);
3085 fetch_source(mach, &arg[1], &inst->Src[1], TGSI_CHAN_Y, TGSI_EXEC_DATA_FLOAT);
3089 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
3090 store_dest(mach, &arg[2], &inst->Dst[0], inst, chan);
3097 const struct tgsi_full_instruction *inst)
3102 fetch_source(mach, &arg[0], &inst->Src[0], TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
3103 fetch_source(mach, &arg[1], &inst->Src[0], TGSI_CHAN_Y, TGSI_EXEC_DATA_FLOAT);
3109 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
3110 store_dest(mach, &dst, &inst->Dst[0], inst, chan);
3117 const struct tgsi_full_instruction *inst)
3122 fetch_source(mach, &arg, &inst->Src[0], TGSI_CHAN_X, TGSI_EXEC_DATA_UINT);
3128 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
3129 store_dest(mach, &dst[chan & 1], &inst->Dst[0], inst, chan);
3148 const struct tgsi_full_instruction *inst)
3154 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
3157 fetch_source(mach, &src[0], &inst->Src[0], chan,
3159 fetch_source(mach, &src[1], &inst->Src[1], chan,
3161 fetch_source(mach, &src[2], &inst->Src[2], chan,
3167 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
3168 store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan);
3175 const struct tgsi_full_instruction *inst)
3180 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
3181 fetch_source(mach, &r[0], &inst->Src[0], TGSI_CHAN_Y, TGSI_EXEC_DATA_FLOAT);
3182 fetch_source(mach, &r[1], &inst->Src[1], TGSI_CHAN_Y, TGSI_EXEC_DATA_FLOAT);
3185 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
3186 fetch_source(mach, &d[TGSI_CHAN_Z], &inst->Src[0], TGSI_CHAN_Z, TGSI_EXEC_DATA_FLOAT);
3188 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
3189 fetch_source(mach, &d[TGSI_CHAN_W], &inst->Src[1], TGSI_CHAN_W, TGSI_EXEC_DATA_FLOAT);
3192 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
3193 store_dest(mach, &OneVec, &inst->Dst[0], inst, TGSI_CHAN_X);
3195 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
3196 store_dest(mach, &d[TGSI_CHAN_Y], &inst->Dst[0], inst, TGSI_CHAN_Y);
3198 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
3199 store_dest(mach, &d[TGSI_CHAN_Z], &inst->Dst[0], inst, TGSI_CHAN_Z);
3201 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
3202 store_dest(mach, &d[TGSI_CHAN_W], &inst->Dst[0], inst, TGSI_CHAN_W);
3208 const struct tgsi_full_instruction *inst)
3212 fetch_source(mach, &r[0], &inst->Src[0], TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
3216 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
3217 store_dest(mach, &r[0], &inst->Dst[0], inst, TGSI_CHAN_X);
3219 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
3222 store_dest(mach, &r[0], &inst->Dst[0], inst, TGSI_CHAN_Y);
3224 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
3225 store_dest(mach, &r[1], &inst->Dst[0], inst, TGSI_CHAN_Z);
3227 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
3228 store_dest(mach, &OneVec, &inst->Dst[0], inst, TGSI_CHAN_W);
3234 const struct tgsi_full_instruction *inst)
3238 fetch_source(mach, &r[0], &inst->Src[0], TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
3240 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
3242 store_dest(mach, &r[2], &inst->Dst[0], inst, TGSI_CHAN_X);
3244 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
3246 store_dest(mach, &r[2], &inst->Dst[0], inst, TGSI_CHAN_Y);
3248 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
3250 store_dest(mach, &r[2], &inst->Dst[0], inst, TGSI_CHAN_Z);
3252 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
3253 store_dest(mach, &OneVec, &inst->Dst[0], inst, TGSI_CHAN_W);
3259 const struct tgsi_full_instruction *inst)
3264 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_YZ) {
3265 fetch_source(mach, &r[0], &inst->Src[0], TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
3266 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Z) {
3267 fetch_source(mach, &r[1], &inst->Src[0], TGSI_CHAN_Y, TGSI_EXEC_DATA_FLOAT);
3270 fetch_source(mach, &r[2], &inst->Src[0], TGSI_CHAN_W, TGSI_EXEC_DATA_FLOAT);
3275 store_dest(mach, &d[TGSI_CHAN_Z], &inst->Dst[0], inst, TGSI_CHAN_Z);
3277 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_Y) {
3279 store_dest(mach, &d[TGSI_CHAN_Y], &inst->Dst[0], inst, TGSI_CHAN_Y);
3282 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
3283 store_dest(mach, &OneVec, &inst->Dst[0], inst, TGSI_CHAN_X);
3286 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
3287 store_dest(mach, &OneVec, &inst->Dst[0], inst, TGSI_CHAN_W);
3310 const struct tgsi_full_instruction *inst)
3316 fetch_source(mach, &mach->Switch.selector, &inst->Src[0], TGSI_CHAN_X, TGSI_EXEC_DATA_UINT);
3328 const struct tgsi_full_instruction *inst)
3334 fetch_source(mach, &src, &inst->Src[0], TGSI_CHAN_X, TGSI_EXEC_DATA_UINT);
3414 const struct tgsi_full_instruction *inst,
3423 if (!inst->Instruction.Saturate) {
3452 const struct tgsi_full_instruction *inst,
3458 if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XY) == TGSI_WRITEMASK_XY) {
3459 fetch_double_channel(mach, &src, &inst->Src[0], TGSI_CHAN_X, TGSI_CHAN_Y);
3461 store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_X, TGSI_CHAN_Y);
3463 if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_ZW) == TGSI_WRITEMASK_ZW) {
3464 fetch_double_channel(mach, &src, &inst->Src[0], TGSI_CHAN_Z, TGSI_CHAN_W);
3466 store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_Z, TGSI_CHAN_W);
3472 const struct tgsi_full_instruction *inst,
3481 wmask = inst->Dst[0].Register.WriteMask;
3491 fetch_double_channel(mach, &src[0], &inst->Src[0], TGSI_CHAN_X, TGSI_CHAN_Y);
3492 fetch_double_channel(mach, &src[1], &inst->Src[1], TGSI_CHAN_X, TGSI_CHAN_Y);
3494 store_double_channel(mach, &dst, &inst->Dst[0], inst, first_dest_chan, second_dest_chan);
3505 fetch_double_channel(mach, &src[0], &inst->Src[0], TGSI_CHAN_Z, TGSI_CHAN_W);
3506 fetch_double_channel(mach, &src[1], &inst->Src[1], TGSI_CHAN_Z, TGSI_CHAN_W);
3508 store_double_channel(mach, &dst, &inst->Dst[0], inst, first_dest_chan, second_dest_chan);
3514 const struct tgsi_full_instruction *inst,
3520 if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XY) == TGSI_WRITEMASK_XY) {
3521 fetch_double_channel(mach, &src[0], &inst->Src[0], TGSI_CHAN_X, TGSI_CHAN_Y);
3522 fetch_double_channel(mach, &src[1], &inst->Src[1], TGSI_CHAN_X, TGSI_CHAN_Y);
3523 fetch_double_channel(mach, &src[2], &inst->Src[2], TGSI_CHAN_X, TGSI_CHAN_Y);
3525 store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_X, TGSI_CHAN_Y);
3527 if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_ZW) == TGSI_WRITEMASK_ZW) {
3528 fetch_double_channel(mach, &src[0], &inst->Src[0], TGSI_CHAN_Z, TGSI_CHAN_W);
3529 fetch_double_channel(mach, &src[1], &inst->Src[1], TGSI_CHAN_Z, TGSI_CHAN_W);
3530 fetch_double_channel(mach, &src[2], &inst->Src[2], TGSI_CHAN_Z, TGSI_CHAN_W);
3532 store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_Z, TGSI_CHAN_W);
3538 const struct tgsi_full_instruction *inst)
3545 wmask = inst->Dst[0].Register.WriteMask;
3547 fetch_double_channel(mach, &src0, &inst->Src[0], TGSI_CHAN_X, TGSI_CHAN_Y);
3548 fetch_source(mach, &src1, &inst->Src[1], TGSI_CHAN_X, TGSI_EXEC_DATA_INT);
3550 store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_X, TGSI_CHAN_Y);
3554 fetch_double_channel(mach, &src0, &inst->Src[0], TGSI_CHAN_Z, TGSI_CHAN_W);
3555 fetch_source(mach, &src1, &inst->Src[1], TGSI_CHAN_Z, TGSI_EXEC_DATA_INT);
3557 store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_Z, TGSI_CHAN_W);
3563 const struct tgsi_full_instruction *inst)
3569 fetch_double_channel(mach, &src, &inst->Src[0], TGSI_CHAN_X, TGSI_CHAN_Y);
3571 if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XY) == TGSI_WRITEMASK_XY)
3572 store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_X, TGSI_CHAN_Y);
3573 if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_ZW) == TGSI_WRITEMASK_ZW)
3574 store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_Z, TGSI_CHAN_W);
3576 if (inst->Dst[1].Register.WriteMask & (1 << chan))
3577 store_dest(mach, &dst_exp, &inst->Dst[1], inst, chan);
3583 const struct tgsi_full_instruction *inst,
3591 wmask = inst->Dst[0].Register.WriteMask;
3593 fetch_double_channel(mach, &src0, &inst->Src[0], TGSI_CHAN_X, TGSI_CHAN_Y);
3594 fetch_source(mach, &src1, &inst->Src[1], TGSI_CHAN_X, TGSI_EXEC_DATA_INT);
3596 store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_X, TGSI_CHAN_Y);
3600 fetch_double_channel(mach, &src0, &inst->Src[0], TGSI_CHAN_Z, TGSI_CHAN_W);
3601 fetch_source(mach, &src1, &inst->Src[1], TGSI_CHAN_Z, TGSI_EXEC_DATA_INT);
3603 store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_Z, TGSI_CHAN_W);
3657 const struct tgsi_full_instruction *inst)
3668 unit = fetch_sampler_unit(mach, inst, 0);
3669 dim = get_image_coord_dim(inst->Memory.Texture);
3670 sample = get_image_coord_sample(inst->Memory.Texture);
3675 params.tgsi_tex_instr = inst->Memory.Texture;
3676 params.format = inst->Memory.Format;
3695 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
3696 store_dest(mach, &r[chan], &inst->Dst[0], inst, chan);
3703 const struct tgsi_full_instruction *inst)
3705 uint32_t unit = fetch_sampler_unit(mach, inst, 0);
3709 switch (inst->Src[0].Register.File) {
3736 assert(inst->Dst[0].Register.WriteMask);
3737 uint32_t load_size = util_last_bit(inst->Dst[0].Register.WriteMask) * 4;
3749 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
3750 store_dest(mach, &rgba[chan], &inst->Dst[0], inst, chan);
3757 const struct tgsi_full_instruction *inst)
3759 if (inst->Src[0].Register.File == TGSI_FILE_IMAGE)
3760 exec_load_img(mach, inst);
3762 exec_load_membuf(mach, inst);
3799 const struct tgsi_full_instruction *inst)
3809 unit = fetch_store_img_unit(mach, &inst->Dst[0]);
3810 dim = get_image_coord_dim(inst->Memory.Texture);
3811 sample = get_image_coord_sample(inst->Memory.Texture);
3816 params.tgsi_tex_instr = inst->Memory.Texture;
3817 params.format = inst->Memory.Format;
3844 const struct tgsi_full_instruction *inst)
3846 uint32_t unit = fetch_store_img_unit(mach, &inst->Dst[0]);
3852 switch (inst->Dst[0].Register.File) {
3883 if (inst->Dst[0].Register.WriteMask & (1 << chan))
3891 const struct tgsi_full_instruction *inst)
3893 if (inst->Dst[0].Register.File == TGSI_FILE_IMAGE)
3894 exec_store_img(mach, inst);
3896 exec_store_membuf(mach, inst);
3901 const struct tgsi_full_instruction *inst)
3912 unit = fetch_sampler_unit(mach, inst, 0);
3913 dim = get_image_coord_dim(inst->Memory.Texture);
3914 sample = get_image_coord_sample(inst->Memory.Texture);
3919 params.tgsi_tex_instr = inst->Memory.Texture;
3920 params.format = inst->Memory.Format;
3928 if (inst->Instruction.Opcode == TGSI_OPCODE_ATOMCAS)
3940 if (inst->Instruction.Opcode == TGSI_OPCODE_ATOMCAS) {
3949 mach->Image->op(mach->Image, ¶ms, inst->Instruction.Opcode,
3960 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
3961 store_dest(mach, &r[chan], &inst->Dst[0], inst, chan);
3968 const struct tgsi_full_instruction *inst)
3975 if (!(inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X))
3979 if (inst->Src[0].Register.File == TGSI_FILE_BUFFER) {
3980 uint32_t unit = fetch_sampler_unit(mach, inst, 0);
3990 assert(inst->Src[0].Register.File == TGSI_FILE_MEMORY);
4001 if (inst->Instruction.Opcode == TGSI_OPCODE_ATOMCAS)
4016 switch (inst->Instruction.Opcode) {
4063 store_dest(mach, &r0, &inst->Dst[0], inst, chan);
4068 const struct tgsi_full_instruction *inst)
4070 if (inst->Src[0].Register.File == TGSI_FILE_IMAGE)
4071 exec_atomop_img(mach, inst);
4073 exec_atomop_membuf(mach, inst);
4078 const struct tgsi_full_instruction *inst)
4086 unit = fetch_sampler_unit(mach, inst, 0);
4090 params.tgsi_tex_instr = inst->Memory.Texture;
4091 params.format = inst->Memory.Format;
4102 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
4103 store_dest(mach, &r[chan], &inst->Dst[0], inst, chan);
4110 const struct tgsi_full_instruction *inst)
4112 uint32_t unit = fetch_sampler_unit(mach, inst, 0);
4120 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_X) {
4122 store_dest(mach, &r, &inst->Dst[0], inst, TGSI_CHAN_X);
4129 const struct tgsi_full_instruction *inst)
4131 if (inst->Src[0].Register.File == TGSI_FILE_IMAGE)
4132 exec_resq_img(mach, inst);
4134 exec_resq_buf(mach, inst);
4239 const struct tgsi_full_instruction *inst,
4246 if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XY) == TGSI_WRITEMASK_XY) {
4247 fetch_source(mach, &src, &inst->Src[0], TGSI_CHAN_X, src_datatype);
4249 store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_X, TGSI_CHAN_Y);
4251 if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_ZW) == TGSI_WRITEMASK_ZW) {
4252 fetch_source(mach, &src, &inst->Src[0], TGSI_CHAN_Y, src_datatype);
4254 store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_Z, TGSI_CHAN_W);
4260 const struct tgsi_full_instruction *inst,
4265 int wm = inst->Dst[0].Register.WriteMask;
4273 fetch_double_channel(mach, &src, &inst->Src[0], TGSI_CHAN_X, TGSI_CHAN_Y);
4275 fetch_double_channel(mach, &src, &inst->Src[0], TGSI_CHAN_Z, TGSI_CHAN_W);
4277 store_dest(mach, &dst, &inst->Dst[0], inst, bit - 1);
4811 const struct tgsi_full_instruction *inst)
4816 const struct tgsi_full_src_register *reg = &inst->Src[0];
4819 assert(inst->Src[1].Register.File == TGSI_FILE_IMMEDIATE);
4822 float sample = mach->Imms[inst->Src[1].Register.Index][inst->Src[1].Register.SwizzleX];
4826 if (!(inst->Dst[0].Register.WriteMask & (1 << chan)))
4842 store_dest(mach, &result[chan], &inst->Dst[0], inst, chan);
4849 const struct tgsi_full_instruction *inst)
4855 const struct tgsi_full_src_register *reg = &inst->Src[0];
4862 fetch_source(mach, &ofsx, &inst->Src[1], TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
4863 fetch_source(mach, &ofsy, &inst->Src[1], TGSI_CHAN_Y, TGSI_EXEC_DATA_FLOAT);
4866 if (!(inst->Dst[0].Register.WriteMask & (1 << chan)))
4871 store_dest(mach, &result, &inst->Dst[0], inst, chan);
4878 const struct tgsi_full_instruction *inst)
4883 const struct tgsi_full_src_register *reg = &inst->Src[0];
4889 if (!(inst->Dst[0].Register.WriteMask & (1 << chan)))
4907 store_dest(mach, &result[chan], &inst->Dst[0], inst, chan);
4921 const struct tgsi_full_instruction *inst,
4928 switch (inst->Instruction.Opcode) {
4930 exec_vector_unary(mach, inst, micro_arl, TGSI_EXEC_DATA_FLOAT);
4934 exec_vector_unary(mach, inst, micro_mov, TGSI_EXEC_DATA_FLOAT);
4938 exec_lit(mach, inst);
4942 exec_scalar_unary(mach, inst, micro_rcp, TGSI_EXEC_DATA_FLOAT);
4946 exec_scalar_unary(mach, inst, micro_rsq, TGSI_EXEC_DATA_FLOAT);
4950 exec_exp(mach, inst);
4954 exec_log(mach, inst);
4958 exec_vector_binary(mach, inst, micro_mul, TGSI_EXEC_DATA_FLOAT);
4962 exec_vector_binary(mach, inst, micro_add, TGSI_EXEC_DATA_FLOAT);
4966 exec_dp3(mach, inst);
4970 exec_dp4(mach, inst);
4974 exec_dst(mach, inst);
4978 exec_vector_binary(mach, inst, micro_min, TGSI_EXEC_DATA_FLOAT);
4982 exec_vector_binary(mach, inst, micro_max, TGSI_EXEC_DATA_FLOAT);
4986 exec_vector_binary(mach, inst, micro_slt, TGSI_EXEC_DATA_FLOAT);
4990 exec_vector_binary(mach, inst, micro_sge, TGSI_EXEC_DATA_FLOAT);
4994 exec_vector_trinary(mach, inst, micro_mad, TGSI_EXEC_DATA_FLOAT);
4998 exec_vector_trinary(mach, inst, micro_lrp, TGSI_EXEC_DATA_FLOAT);
5002 exec_scalar_unary(mach, inst, micro_sqrt, TGSI_EXEC_DATA_FLOAT);
5006 exec_vector_unary(mach, inst, micro_frc, TGSI_EXEC_DATA_FLOAT);
5010 exec_vector_unary(mach, inst, micro_flr, TGSI_EXEC_DATA_FLOAT);
5014 exec_vector_unary(mach, inst, micro_rnd, TGSI_EXEC_DATA_FLOAT);
5018 exec_scalar_unary(mach, inst, micro_exp2, TGSI_EXEC_DATA_FLOAT);
5022 exec_scalar_unary(mach, inst, micro_lg2, TGSI_EXEC_DATA_FLOAT);
5026 exec_scalar_binary(mach, inst, micro_pow, TGSI_EXEC_DATA_FLOAT);
5030 exec_vector_binary(mach, inst, micro_ldexp, TGSI_EXEC_DATA_FLOAT);
5034 exec_scalar_unary(mach, inst, micro_cos, TGSI_EXEC_DATA_FLOAT);
5038 exec_vector_unary(mach, inst, micro_ddx_fine, TGSI_EXEC_DATA_FLOAT);
5042 exec_vector_unary(mach, inst, micro_ddx, TGSI_EXEC_DATA_FLOAT);
5046 exec_vector_unary(mach, inst, micro_ddy_fine, TGSI_EXEC_DATA_FLOAT);
5050 exec_vector_unary(mach, inst, micro_ddy, TGSI_EXEC_DATA_FLOAT);
5058 exec_kill_if (mach, inst);
5062 exec_pk2h(mach, inst);
5078 exec_vector_binary(mach, inst, micro_seq, TGSI_EXEC_DATA_FLOAT);
5082 exec_vector_binary(mach, inst, micro_sgt, TGSI_EXEC_DATA_FLOAT);
5086 exec_scalar_unary(mach, inst, micro_sin, TGSI_EXEC_DATA_FLOAT);
5090 exec_vector_binary(mach, inst, micro_sle, TGSI_EXEC_DATA_FLOAT);
5094 exec_vector_binary(mach, inst, micro_sne, TGSI_EXEC_DATA_FLOAT);
5101 exec_tex(mach, inst, TEX_MODIFIER_NONE, 1);
5108 exec_tex(mach, inst, TEX_MODIFIER_LOD_BIAS, 1);
5117 exec_txd(mach, inst);
5124 exec_tex(mach, inst, TEX_MODIFIER_EXPLICIT_LOD, 1);
5131 exec_tex(mach, inst, TEX_MODIFIER_PROJECTED, 1);
5138 exec_tex(mach, inst, TEX_MODIFIER_GATHER, 2);
5144 exec_lodq(mach, inst);
5148 exec_up2h(mach, inst);
5164 exec_vector_unary(mach, inst, micro_arr, TGSI_EXEC_DATA_FLOAT);
5207 *pc = inst->Label.Label;
5260 exec_vector_unary(mach, inst, micro_sgn, TGSI_EXEC_DATA_FLOAT);
5264 exec_vector_trinary(mach, inst, micro_cmp, TGSI_EXEC_DATA_FLOAT);
5268 exec_vector_binary(mach, inst, micro_div, TGSI_EXEC_DATA_FLOAT);
5272 exec_dp2(mach, inst);
5287 *pc = inst->Label.Label;
5302 *pc = inst->Label.Label;
5316 *pc = inst->Label.Label;
5336 exec_vector_unary(mach, inst, micro_ceil, TGSI_EXEC_DATA_FLOAT);
5340 exec_vector_unary(mach, inst, micro_i2f, TGSI_EXEC_DATA_INT);
5344 exec_vector_unary(mach, inst, micro_not, TGSI_EXEC_DATA_UINT);
5348 exec_vector_unary(mach, inst, micro_trunc, TGSI_EXEC_DATA_FLOAT);
5352 exec_vector_binary(mach, inst, micro_shl, TGSI_EXEC_DATA_UINT);
5356 exec_vector_binary(mach, inst, micro_and, TGSI_EXEC_DATA_UINT);
5360 exec_vector_binary(mach, inst, micro_or, TGSI_EXEC_DATA_UINT);
5364 exec_vector_binary(mach, inst, micro_mod, TGSI_EXEC_DATA_INT);
5368 exec_vector_binary(mach, inst, micro_xor, TGSI_EXEC_DATA_UINT);
5372 exec_txf(mach, inst);
5376 exec_txq(mach, inst);
5380 emit_vertex(mach, inst);
5384 emit_primitive(mach, inst);
5476 exec_vector_unary(mach, inst, micro_f2i, TGSI_EXEC_DATA_FLOAT);
5480 exec_vector_binary(mach, inst, micro_fseq, TGSI_EXEC_DATA_FLOAT);
5484 exec_vector_binary(mach, inst, micro_fsge, TGSI_EXEC_DATA_FLOAT);
5488 exec_vector_binary(mach, inst, micro_fslt, TGSI_EXEC_DATA_FLOAT);
5492 exec_vector_binary(mach, inst, micro_fsne, TGSI_EXEC_DATA_FLOAT);
5496 exec_vector_binary(mach, inst, micro_idiv, TGSI_EXEC_DATA_INT);
5500 exec_vector_binary(mach, inst, micro_imax, TGSI_EXEC_DATA_INT);
5504 exec_vector_binary(mach, inst, micro_imin, TGSI_EXEC_DATA_INT);
5508 exec_vector_unary(mach, inst, micro_ineg, TGSI_EXEC_DATA_INT);
5512 exec_vector_binary(mach, inst, micro_isge, TGSI_EXEC_DATA_INT);
5516 exec_vector_binary(mach, inst, micro_ishr, TGSI_EXEC_DATA_INT);
5520 exec_vector_binary(mach, inst, micro_islt, TGSI_EXEC_DATA_INT);
5524 exec_vector_unary(mach, inst, micro_f2u, TGSI_EXEC_DATA_FLOAT);
5528 exec_vector_unary(mach, inst, micro_u2f, TGSI_EXEC_DATA_UINT);
5532 exec_vector_binary(mach, inst, micro_uadd, TGSI_EXEC_DATA_INT);
5536 exec_vector_binary(mach, inst, micro_udiv, TGSI_EXEC_DATA_UINT);
5540 exec_vector_trinary(mach, inst, micro_umad, TGSI_EXEC_DATA_UINT);
5544 exec_vector_binary(mach, inst, micro_umax, TGSI_EXEC_DATA_UINT);
5548 exec_vector_binary(mach, inst, micro_umin, TGSI_EXEC_DATA_UINT);
5552 exec_vector_binary(mach, inst, micro_umod, TGSI_EXEC_DATA_UINT);
5556 exec_vector_binary(mach, inst, micro_umul, TGSI_EXEC_DATA_UINT);
5560 exec_vector_binary(mach, inst, micro_imul_hi, TGSI_EXEC_DATA_INT);
5564 exec_vector_binary(mach, inst, micro_umul_hi, TGSI_EXEC_DATA_UINT);
5568 exec_vector_binary(mach, inst, micro_useq, TGSI_EXEC_DATA_UINT);
5572 exec_vector_binary(mach, inst, micro_usge, TGSI_EXEC_DATA_UINT);
5576 exec_vector_binary(mach, inst, micro_ushr, TGSI_EXEC_DATA_UINT);
5580 exec_vector_binary(mach, inst, micro_uslt, TGSI_EXEC_DATA_UINT);
5584 exec_vector_binary(mach, inst, micro_usne, TGSI_EXEC_DATA_UINT);
5588 exec_switch(mach, inst);
5592 exec_case(mach, inst);
5604 exec_txf(mach, inst);
5608 exec_txf(mach, inst);
5612 exec_sample(mach, inst, TEX_MODIFIER_NONE, FALSE);
5616 exec_sample(mach, inst, TEX_MODIFIER_LOD_BIAS, FALSE);
5620 exec_sample(mach, inst, TEX_MODIFIER_NONE, TRUE);
5624 exec_sample(mach, inst, TEX_MODIFIER_LEVEL_ZERO, TRUE);
5628 exec_sample_d(mach, inst);
5632 exec_sample(mach, inst, TEX_MODIFIER_EXPLICIT_LOD, FALSE);
5636 exec_sample(mach, inst, TEX_MODIFIER_GATHER, FALSE);
5640 exec_txq(mach, inst);
5652 exec_lodq(mach, inst);
5656 exec_vector_unary(mach, inst, micro_uarl, TGSI_EXEC_DATA_UINT);
5660 exec_ucmp(mach, inst);
5664 exec_vector_unary(mach, inst, micro_iabs, TGSI_EXEC_DATA_INT);
5668 exec_vector_unary(mach, inst, micro_isgn, TGSI_EXEC_DATA_INT);
5676 exec_tex(mach, inst, TEX_MODIFIER_NONE, 2);
5683 exec_tex(mach, inst, TEX_MODIFIER_LOD_BIAS, 2);
5690 exec_tex(mach, inst, TEX_MODIFIER_EXPLICIT_LOD, 2);
5694 exec_vector_trinary(mach, inst, micro_ibfe, TGSI_EXEC_DATA_INT);
5697 exec_vector_trinary(mach, inst, micro_ubfe, TGSI_EXEC_DATA_UINT);
5700 exec_vector_quaternary(mach, inst, micro_bfi, TGSI_EXEC_DATA_UINT);
5703 exec_vector_unary(mach, inst, micro_brev, TGSI_EXEC_DATA_UINT);
5706 exec_vector_unary(mach, inst, micro_popc, TGSI_EXEC_DATA_UINT);
5709 exec_vector_unary(mach, inst, micro_lsb, TGSI_EXEC_DATA_UINT);
5712 exec_vector_unary(mach, inst, micro_imsb, TGSI_EXEC_DATA_INT);
5715 exec_vector_unary(mach, inst, micro_umsb, TGSI_EXEC_DATA_UINT);
5719 exec_t_2_64(mach, inst, micro_f2d, TGSI_EXEC_DATA_FLOAT);
5723 exec_64_2_t(mach, inst, micro_d2f);
5727 exec_double_unary(mach, inst, micro_dabs);
5731 exec_double_unary(mach, inst, micro_dneg);
5735 exec_double_binary(mach, inst, micro_dadd, TGSI_EXEC_DATA_DOUBLE);
5739 exec_double_binary(mach, inst, micro_ddiv, TGSI_EXEC_DATA_DOUBLE);
5743 exec_double_binary(mach, inst, micro_dmul, TGSI_EXEC_DATA_DOUBLE);
5747 exec_double_binary(mach, inst, micro_dmax, TGSI_EXEC_DATA_DOUBLE);
5751 exec_double_binary(mach, inst, micro_dmin, TGSI_EXEC_DATA_DOUBLE);
5755 exec_double_binary(mach, inst, micro_dslt, TGSI_EXEC_DATA_UINT);
5759 exec_double_binary(mach, inst, micro_dsge, TGSI_EXEC_DATA_UINT);
5763 exec_double_binary(mach, inst, micro_dseq, TGSI_EXEC_DATA_UINT);
5767 exec_double_binary(mach, inst, micro_dsne, TGSI_EXEC_DATA_UINT);
5771 exec_double_unary(mach, inst, micro_drcp);
5775 exec_double_unary(mach, inst, micro_dsqrt);
5779 exec_double_unary(mach, inst, micro_drsq);
5783 exec_double_trinary(mach, inst, micro_dmad);
5787 exec_double_unary(mach, inst, micro_dfrac);
5791 exec_double_unary(mach, inst, micro_dflr);
5795 exec_dldexp(mach, inst);
5799 exec_dfracexp(mach, inst);
5803 exec_t_2_64(mach, inst, micro_i2d, TGSI_EXEC_DATA_FLOAT);
5807 exec_64_2_t(mach, inst, micro_d2i);
5811 exec_t_2_64(mach, inst, micro_u2d, TGSI_EXEC_DATA_FLOAT);
5815 exec_64_2_t(mach, inst, micro_d2u);
5819 exec_load(mach, inst);
5823 exec_store(mach, inst);
5837 exec_atomop(mach, inst);
5841 exec_resq(mach, inst);
5849 exec_double_unary(mach, inst, micro_i64abs);
5853 exec_double_unary(mach, inst, micro_i64sgn);
5857 exec_double_unary(mach, inst, micro_i64neg);
5861 exec_double_binary(mach, inst, micro_u64seq, TGSI_EXEC_DATA_UINT);
5865 exec_double_binary(mach, inst, micro_u64sne, TGSI_EXEC_DATA_UINT);
5869 exec_double_binary(mach, inst, micro_i64slt, TGSI_EXEC_DATA_UINT);
5872 exec_double_binary(mach, inst, micro_u64slt, TGSI_EXEC_DATA_UINT);
5876 exec_double_binary(mach, inst, micro_i64sge, TGSI_EXEC_DATA_UINT);
5879 exec_double_binary(mach, inst, micro_u64sge, TGSI_EXEC_DATA_UINT);
5883 exec_double_binary(mach, inst, micro_i64min, TGSI_EXEC_DATA_INT64);
5886 exec_double_binary(mach, inst, micro_u64min, TGSI_EXEC_DATA_UINT64);
5889 exec_double_binary(mach, inst, micro_i64max, TGSI_EXEC_DATA_INT64);
5892 exec_double_binary(mach, inst, micro_u64max, TGSI_EXEC_DATA_UINT64);
5895 exec_double_binary(mach, inst, micro_u64add, TGSI_EXEC_DATA_UINT64);
5898 exec_double_binary(mach, inst, micro_u64mul, TGSI_EXEC_DATA_UINT64);
5901 exec_arg0_64_arg1_32(mach, inst, micro_u64shl);
5904 exec_arg0_64_arg1_32(mach, inst, micro_i64shr);
5907 exec_arg0_64_arg1_32(mach, inst, micro_u64shr);
5910 exec_double_binary(mach, inst, micro_u64div, TGSI_EXEC_DATA_UINT64);
5913 exec_double_binary(mach, inst, micro_i64div, TGSI_EXEC_DATA_INT64);
5916 exec_double_binary(mach, inst, micro_u64mod, TGSI_EXEC_DATA_UINT64);
5919 exec_double_binary(mach, inst, micro_i64mod, TGSI_EXEC_DATA_INT64);
5923 exec_t_2_64(mach, inst, micro_f2u64, TGSI_EXEC_DATA_FLOAT);
5927 exec_t_2_64(mach, inst, micro_f2i64, TGSI_EXEC_DATA_FLOAT);
5931 exec_t_2_64(mach, inst, micro_u2i64, TGSI_EXEC_DATA_INT);
5934 exec_t_2_64(mach, inst, micro_i2i64, TGSI_EXEC_DATA_INT);
5938 exec_double_unary(mach, inst, micro_d2u64);
5942 exec_double_unary(mach, inst, micro_d2i64);
5946 exec_64_2_t(mach, inst, micro_u642f);
5949 exec_64_2_t(mach, inst, micro_i642f);
5953 exec_double_unary(mach, inst, micro_u642d);
5956 exec_double_unary(mach, inst, micro_i642d);
5959 exec_interp_at_sample(mach, inst);
5962 exec_interp_at_offset(mach, inst);
5965 exec_interp_at_centroid(mach, inst);
6032 uint inst = 1;
6049 tgsi_dump_instruction(&mach->Instructions[mach->pc], inst++);