Lines Matching defs:builder

1685                         struct tu_pipeline_builder *builder)
1691 bool shared_consts_enable = tu6_shared_constants_enable(builder->layout,
1692 builder->device->compiler);
1703 for (; stage < ARRAY_SIZE(builder->shader_iova); stage++) {
1704 tu6_emit_xs_config(cs, stage, builder->shaders->variants[stage]);
1710 struct tu_pipeline_builder *builder,
1714 const struct ir3_shader_variant *vs = builder->shaders->variants[MESA_SHADER_VERTEX];
1715 const struct ir3_shader_variant *bs = builder->binning_variant;
1716 const struct ir3_shader_variant *hs = builder->shaders->variants[MESA_SHADER_TESS_CTRL];
1717 const struct ir3_shader_variant *ds = builder->shaders->variants[MESA_SHADER_TESS_EVAL];
1718 const struct ir3_shader_variant *gs = builder->shaders->variants[MESA_SHADER_GEOMETRY];
1719 const struct ir3_shader_variant *fs = builder->shaders->variants[MESA_SHADER_FRAGMENT];
1721 uint32_t cps_per_patch = builder->create_info->pTessellationState ?
1722 builder->create_info->pTessellationState->patchControlPoints : 0;
1723 bool multi_pos_output = builder->shaders->multi_pos_output;
1730 tu6_emit_xs(cs, stage, bs, &builder->pvtmem, builder->binning_vs_iova);
1734 for (; stage < ARRAY_SIZE(builder->shader_iova); stage++) {
1735 const struct ir3_shader_variant *xs = builder->shaders->variants[stage];
1740 tu6_emit_xs(cs, stage, xs, &builder->pvtmem, builder->shader_iova[stage]);
1743 uint32_t multiview_views = util_logbase2(builder->multiview_mask) + 1;
1744 uint32_t multiview_cntl = builder->multiview_mask ?
1754 if (builder->device->physical_device->info->a6xx.has_cp_reg_write) {
1767 builder->device->physical_device->info->a6xx.supports_multiview_mask) {
1769 tu_cs_emit(cs, builder->multiview_mask);
1778 bool no_earlyz = builder->depth_attachment_format == VK_FORMAT_S8_UINT;
1779 uint32_t mrt_count = builder->color_attachment_count;
1780 uint32_t render_components = builder->render_components;
1782 if (builder->alpha_to_coverage) {
1797 builder->use_dual_src_blend,
1806 builder->use_dual_src_blend,
2341 struct tu_pipeline_builder *builder,
2347 if (builder) {
2350 for (uint32_t i = 0; i < ARRAY_SIZE(builder->shaders->variants); i++) {
2351 if (builder->shaders->variants[i]) {
2352 size += builder->shaders->variants[i]->info.size / 4;
2356 size += builder->binning_variant->info.size / 4;
2358 builder->additional_cs_reserve_size = 0;
2359 for (unsigned i = 0; i < ARRAY_SIZE(builder->shaders->variants); i++) {
2360 struct ir3_shader_variant *variant = builder->shaders->variants[i];
2362 builder->additional_cs_reserve_size +=
2366 builder->additional_cs_reserve_size +=
2373 size += builder->additional_cs_reserve_size * 2;
2515 tu_link_shaders(struct tu_pipeline_builder *builder,
2787 tu_pipeline_builder_compile_shaders(struct tu_pipeline_builder *builder,
2791 const struct ir3_compiler *compiler = builder->device->compiler;
2803 vk_find_struct_const(builder->create_info->pNext, PIPELINE_CREATION_FEEDBACK_CREATE_INFO);
2805 for (uint32_t i = 0; i < builder->create_info->stageCount; i++) {
2807 vk_to_mesa_shader_stage(builder->create_info->pStages[i].stage);
2808 stage_infos[stage] = &builder->create_info->pStages[i];
2811 if (tu6_shared_constants_enable(builder->layout, builder->device->compiler)) {
2814 .dwords = builder->layout->push_constant_size / 4,
2821 tu_shader_key_init(&keys[stage], stage_infos[stage], builder->device);
2825 tu_pipeline_shader_key_init(&ir3_key, pipeline, builder->create_info);
2827 keys[MESA_SHADER_VERTEX].multiview_mask = builder->multiview_mask;
2828 keys[MESA_SHADER_FRAGMENT].multiview_mask = builder->multiview_mask;
2832 tu_hash_shaders(pipeline_sha1, stage_infos, builder->layout, keys, &ir3_key, compiler);
2834 const bool executable_info = builder->create_info->flags &
2845 tu_pipeline_cache_lookup(builder->cache, &pipeline_sha1,
2849 if (application_cache_hit && builder->cache != builder->device->mem_cache) {
2858 if (builder->create_info->flags &
2875 nir[stage] = tu_spirv_to_nir(builder->device, builder->mem_ctx, stage_info, stage);
2887 ir3_get_compiler_options(builder->device->compiler);
2905 tu_link_shaders(builder, nir, ARRAY_SIZE(nir));
2916 tu_shader_create(builder->device, nir[stage], &keys[stage],
2917 builder->layout, builder->alloc);
2962 tu_shaders_init(builder->device, &pipeline_sha1, sizeof(pipeline_sha1));
3019 tu_shader_destroy(builder->device, shaders[stage], builder->alloc);
3024 tu_pipeline_cache_insert(builder->cache, compiled_shaders);
3046 builder->binning_variant = variant;
3048 builder->shaders = compiled_shaders;
3060 assert(builder->create_info->stageCount ==
3062 for (uint32_t i = 0; i < builder->create_info->stageCount; i++) {
3064 vk_to_mesa_shader_stage(builder->create_info->pStages[i].stage);
3075 tu_shader_destroy(builder->device, shaders[stage], builder->alloc);
3086 tu_pipeline_builder_parse_dynamic(struct tu_pipeline_builder *builder,
3090 builder->create_info->pDynamicState;
3219 tu_pipeline_builder_parse_shader_stages(struct tu_pipeline_builder *builder,
3236 tu6_emit_program_config(&prog_cs, builder);
3239 tu_cs_begin_sub_stream(&pipeline->cs, 512 + builder->additional_cs_reserve_size, &prog_cs);
3240 tu6_emit_program(&prog_cs, builder, false, pipeline);
3243 tu_cs_begin_sub_stream(&pipeline->cs, 512 + builder->additional_cs_reserve_size, &prog_cs);
3244 tu6_emit_program(&prog_cs, builder, true, pipeline);
3248 for (unsigned i = 0; i < builder->create_info->stageCount; i++) {
3249 stages |= builder->create_info->pStages[i].stage;
3253 for (unsigned i = 0; i < ARRAY_SIZE(builder->shaders->variants); i++) {
3254 if (!builder->shaders->variants[i])
3258 &builder->shaders->push_consts[i],
3259 builder->shaders->variants[i]);
3264 tu_pipeline_builder_parse_vertex_input(struct tu_pipeline_builder *builder,
3268 builder->create_info->pVertexInputState;
3269 const struct ir3_shader_variant *vs = builder->shaders->variants[MESA_SHADER_VERTEX];
3270 const struct ir3_shader_variant *bs = builder->binning_variant;
3284 tu_pipeline_builder_parse_input_assembly(struct tu_pipeline_builder *builder,
3288 builder->create_info->pInputAssemblyState;
3308 tu_pipeline_builder_parse_tessellation(struct tu_pipeline_builder *builder,
3316 builder->create_info->pTessellationState;
3325 const struct ir3_shader_variant *hs = builder->shaders->variants[MESA_SHADER_TESS_CTRL];
3330 tu_pipeline_builder_parse_viewport(struct tu_pipeline_builder *builder,
3341 if (builder->rasterizer_discard)
3345 builder->create_info->pViewportState;
3360 tu_pipeline_builder_parse_rasterization(struct tu_pipeline_builder *builder,
3364 builder->create_info->pRasterizationState;
3368 builder->depth_clip_disable = rast_info->depthClampEnable;
3373 builder->depth_clip_disable = !depth_clip_state->depthClipEnable;
3392 (builder->device->physical_device->info->a6xx.has_shading_rate ? 8 : 0) +
3393 (builder->emit_msaa_state ? 11 : 0);
3398 .znear_clip_disable = builder->depth_clip_disable,
3399 .zfar_clip_disable = builder->depth_clip_disable,
3416 if (builder->device->physical_device->info->a6xx.has_shading_rate) {
3426 if (builder->emit_msaa_state)
3427 tu6_emit_msaa(&cs, builder->samples, pipeline->line_mode);
3447 tu6_gras_su_cntl(rast_info, pipeline->line_mode, builder->multiview_mask != 0);
3465 tu_pipeline_builder_parse_depth_stencil(struct tu_pipeline_builder *builder,
3477 builder->create_info->pDepthStencilState;
3479 vk_format_to_pipe_format(builder->depth_attachment_format);
3483 if (builder->depth_attachment_format != VK_FORMAT_UNDEFINED &&
3484 builder->depth_attachment_format != VK_FORMAT_S8_UINT) {
3491 if (builder->depth_clip_disable)
3502 tu6_apply_depth_bounds_workaround(builder->device, &rb_depth_cntl);
3515 if (builder->depth_attachment_format != VK_FORMAT_UNDEFINED) {
3553 if (builder->depth_attachment_format == VK_FORMAT_UNDEFINED)
3578 if (builder->shaders->variants[MESA_SHADER_FRAGMENT]) {
3579 const struct ir3_shader_variant *fs = builder->shaders->variants[MESA_SHADER_FRAGMENT];
3580 if (fs->has_kill || builder->alpha_to_coverage) {
3591 struct tu_pipeline_builder *builder, struct tu_pipeline *pipeline)
3609 if (builder->rasterizer_discard)
3614 builder->create_info->pMultisampleState;
3616 builder->use_color_attachments ? builder->create_info->pColorBlendState
3621 builder->color_attachment_formats,
3628 builder->use_dual_src_blend, msaa_info);
3654 VkFormat format = builder->color_attachment_formats[i];
3683 struct tu_pipeline_builder *builder, struct tu_pipeline *pipeline)
3685 if (builder->rasterizer_discard)
3688 pipeline->subpass_feedback_loop_ds = builder->subpass_feedback_loop_ds;
3691 builder->create_info->pColorBlendState;
3694 builder->create_info->pDepthStencilState;
3696 if (builder->use_color_attachments) {
3702 if (builder->depth_attachment_format != VK_FORMAT_UNDEFINED) {
3709 if (unlikely(builder->device->physical_device->instance->debug_flags & TU_DEBUG_RAST_ORDER))
3737 if (builder->subpass_feedback_loop_color ||
3738 builder->subpass_feedback_loop_ds) {
3773 tu_pipeline_builder_build(struct tu_pipeline_builder *builder,
3778 *pipeline = vk_object_zalloc(&builder->device->vk, builder->alloc,
3787 result = tu_pipeline_builder_compile_shaders(builder, *pipeline);
3789 vk_object_free(&builder->device->vk, builder->alloc, *pipeline);
3793 result = tu_pipeline_allocate_cs(builder->device, *pipeline,
3794 builder->layout, builder, NULL);
3796 vk_object_free(&builder->device->vk, builder->alloc, *pipeline);
3800 for (uint32_t i = 0; i < ARRAY_SIZE(builder->shader_iova); i++)
3801 builder->shader_iova[i] =
3802 tu_upload_variant(*pipeline, builder->shaders->variants[i]);
3804 builder->binning_vs_iova =
3805 tu_upload_variant(*pipeline, builder->binning_variant);
3814 for (uint32_t i = 0; i < ARRAY_SIZE(builder->shaders->variants); i++) {
3815 if (builder->shaders->variants[i]) {
3816 pvtmem_size = MAX2(pvtmem_size, builder->shaders->variants[i]->pvtmem_size);
3817 if (!builder->shaders->variants[i]->pvtmem_per_wave)
3822 if (builder->binning_variant) {
3823 pvtmem_size = MAX2(pvtmem_size, builder->binning_variant->pvtmem_size);
3824 if (!builder->binning_variant->pvtmem_per_wave)
3828 result = tu_setup_pvtmem(builder->device, *pipeline, &builder->pvtmem,
3831 vk_object_free(&builder->device->vk, builder->alloc, *pipeline);
3835 tu_pipeline_builder_parse_dynamic(builder, *pipeline);
3836 tu_pipeline_builder_parse_shader_stages(builder, *pipeline);
3837 tu_pipeline_builder_parse_vertex_input(builder, *pipeline);
3838 tu_pipeline_builder_parse_input_assembly(builder, *pipeline);
3839 tu_pipeline_builder_parse_tessellation(builder, *pipeline);
3840 tu_pipeline_builder_parse_viewport(builder, *pipeline);
3841 tu_pipeline_builder_parse_rasterization(builder, *pipeline);
3842 tu_pipeline_builder_parse_depth_stencil(builder, *pipeline);
3843 tu_pipeline_builder_parse_multisample_and_color_blend(builder, *pipeline);
3844 tu_pipeline_builder_parse_rasterization_order(builder, *pipeline);
3845 tu6_emit_load_state(*pipeline, builder->layout, false);
3851 tu_pipeline_builder_finish(struct tu_pipeline_builder *builder)
3853 if (builder->shaders)
3854 vk_pipeline_cache_object_unref(&builder->shaders->base);
3855 ralloc_free(builder->mem_ctx);
3860 struct tu_pipeline_builder *builder,
3868 *builder = (struct tu_pipeline_builder) {
3888 builder->rasterizer_discard =
3889 builder->create_info->pRasterizationState->rasterizerDiscardEnable &&
3899 builder->subpass_raster_order_attachment_access = false;
3900 builder->subpass_feedback_loop_ds = false;
3901 builder->subpass_feedback_loop_color = false;
3903 builder->multiview_mask = rendering_info->viewMask;
3913 builder->emit_msaa_state = !builder->rasterizer_discard;
3919 builder->subpass_feedback_loop_ds =
3922 builder->subpass_feedback_loop_color =
3926 if (!builder->rasterizer_discard) {
3927 builder->depth_attachment_format =
3932 builder->color_attachment_count =
3936 builder->color_attachment_formats[i] =
3938 if (builder->color_attachment_formats[i] != VK_FORMAT_UNDEFINED) {
3939 builder->use_color_attachments = true;
3940 builder->render_components |= 0xf << (i * 4);
3950 builder->subpass_raster_order_attachment_access =
3952 builder->subpass_feedback_loop_color = subpass->feedback_loop_color;
3953 builder->subpass_feedback_loop_ds = subpass->feedback_loop_ds;
3955 builder->multiview_mask = subpass->multiview_mask;
3958 builder->emit_msaa_state = (subpass->samples == 0) && !builder->rasterizer_discard;
3960 if (!builder->rasterizer_discard) {
3962 builder->depth_attachment_format = (a != VK_ATTACHMENT_UNUSED) ?
3968 builder->color_attachment_count = subpass->color_count;
3974 builder->color_attachment_formats[i] = pass->attachments[a].format;
3975 builder->use_color_attachments = true;
3976 builder->render_components |= 0xf << (i * 4);
3982 if (builder->rasterizer_discard) {
3983 builder->samples = VK_SAMPLE_COUNT_1_BIT;
3985 builder->samples = create_info->pMultisampleState->rasterizationSamples;
3986 builder->alpha_to_coverage = create_info->pMultisampleState->alphaToCoverageEnable;
3989 builder->color_attachment_count++;
3990 builder->use_dual_src_blend = true;
3992 if (builder->color_attachment_formats[0] != VK_FORMAT_UNDEFINED)
3993 builder->render_components |= 0xf << 4;
4010 struct tu_pipeline_builder builder;
4011 tu_pipeline_builder_init_graphics(&builder, dev, cache,
4015 VkResult result = tu_pipeline_builder_build(&builder, &pipeline);
4016 tu_pipeline_builder_finish(&builder);