Lines Matching defs:src
224 ra_foreach_src (src, instr) {
225 src->next_use = tmp_next_use[src->def->name];
231 ra_foreach_src_n (src, i, instr) {
232 if (src->def->merge_set == instr->dsts[i]->merge_set &&
233 src->def->merge_set_offset == instr->dsts[i]->merge_set_offset) {
234 tmp_next_use[src->def->name] =
237 tmp_next_use[src->def->name] = cycle;
241 ra_foreach_src (src, instr) {
242 tmp_next_use[src->def->name] = cycle;
282 unsigned src = phi->srcs[i]->def->name;
285 pred_state->next_use_end[src]) {
286 pred_state->next_use_end[src] = phi->dsts[0]->next_use +
359 struct ir3_register *src =
361 *src = *reg->instr->srcs[i];
587 insert_src(struct ra_spill_ctx *ctx, struct ir3_register *src)
589 struct ra_spill_interval *interval = ctx->intervals[src->def->name];
603 struct ir3_register *src)
605 struct ra_spill_interval *interval = ctx->intervals[src->def->name];
616 struct ir3_register *src)
618 struct ra_spill_interval *interval = ctx->intervals[src->def->name];
645 update_src_next_use(struct ra_spill_ctx *ctx, struct ir3_register *src)
647 struct ra_spill_interval *interval = ctx->intervals[src->def->name];
651 interval->next_use_distance = src->next_use;
656 if (!interval->interval.parent && !(src->flags & IR3_REG_SHARED)) {
657 if (src->flags & IR3_REG_HALF) {
662 if (ctx->merged_regs || !(src->flags & IR3_REG_HALF)) {
690 set_src_val(struct ir3_register *src, const struct reg_or_immed *val)
693 src->flags = IR3_REG_IMMED | (val->flags & IR3_REG_HALF);
694 src->uim_val = val->uimm;
695 src->def = NULL;
697 src->flags = IR3_REG_CONST | (val->flags & IR3_REG_HALF);
698 src->num = val->const_num;
699 src->def = NULL;
701 src->def = val->def;
707 materialize_pcopy_src(const struct reg_or_immed *src,
713 dst->flags |= src->flags & IR3_REG_HALF;
714 struct ir3_register *mov_src = ir3_src_create(mov, INVALID_REG, src->flags);
715 set_src_val(mov_src, src);
717 (src->flags & IR3_REG_HALF) ? TYPE_U16 : TYPE_U32;
730 /* If spilling an immed/const pcopy src, we need to actually materialize it
750 struct ir3_register *src = ir3_src_create(spill, INVALID_REG, src_flags);
755 src->def = reg;
757 src->size = reg->size;
758 src->array.id = reg->array.id;
759 src->array.offset = 0;
761 src->wrmask = reg->wrmask;
860 struct ir3_register *src = ir3_src_create(split, INVALID_REG, def->flags);
861 src->wrmask = def->wrmask;
862 src->def = def;
1000 struct ir3_register *src)
1002 struct ra_spill_interval *interval = ctx->intervals[src->def->name];
1005 reload_def(ctx, src->def, instr, instr->block);
1013 struct ir3_register *src)
1015 struct ra_spill_interval *interval = ctx->intervals[src->def->name];
1017 set_src_val(src, &interval->dst);
1044 ra_foreach_src (src, instr)
1045 insert_src(ctx, src);
1068 ra_foreach_src (src, instr) {
1069 reload_src(ctx, instr, src);
1070 update_src_next_use(ctx, src);
1074 ra_foreach_src (src, instr) {
1075 if (src->flags & IR3_REG_FIRST_KILL)
1076 remove_src_early(ctx, instr, src);
1091 ra_foreach_src (src, instr) {
1092 if (src->flags & IR3_REG_FIRST_KILL)
1093 remove_src(ctx, instr, src);
1097 ra_foreach_src (src, instr) {
1098 rewrite_src(ctx, instr, src);
1143 struct ir3_register *src = pcopy->srcs[src_n];
1144 if (!(src->flags & IR3_REG_KILL))
1147 if (pcopy->srcs[j]->def == src->def)
1201 foreach_src_n (src, i, pcopy) {
1202 d("processing src %u", i);
1209 if (src->def && src->def->merge_set &&
1210 src->def->merge_set == dst->merge_set &&
1211 src->def->merge_set_offset == dst->merge_set_offset) {
1212 struct ra_spill_interval *src_interval = ctx->intervals[src->def->name];
1215 update_src_next_use(ctx, src);
1224 } else if (src->def) {
1228 temp_interval->next_use_distance = src->next_use;
1230 insert_src(ctx, src);
1232 reload_src(ctx, pcopy, src);
1233 update_src_next_use(ctx, src);
1235 remove_src(ctx, pcopy, src);
1237 ctx->intervals[src->def->name];
1245 src->flags = temp->flags;
1246 src->def = temp;
1252 foreach_src_n (src, i, pcopy) {
1255 if (src->def && src->def->merge_set &&
1256 src->def->merge_set == dst->merge_set &&
1257 src->def->merge_set_offset == dst->merge_set_offset)
1262 if (!src->def) {
1268 assert(src->flags & (IR3_REG_CONST | IR3_REG_IMMED));
1269 if (src->flags & IR3_REG_CONST) {
1270 dst_interval->dst.flags = src->flags;
1271 dst_interval->dst.const_num = src->num;
1273 dst_interval->dst.flags = src->flags;
1274 dst_interval->dst.uimm = src->uim_val;
1277 struct ra_spill_interval *temp_interval = ctx->intervals[src->def->name];
1279 insert_src(ctx, src);
1281 reload_src(ctx, pcopy, src);
1282 remove_src(ctx, pcopy, src);
1304 ra_foreach_src (src, instr)
1305 remove_src(ctx, instr, src);
1578 struct ir3_register *src = ir3_src_create(phi, INVALID_REG, dst->flags);
1579 src->size = def->size;
1580 src->wrmask = def->wrmask;
1587 set_src_val(src, new_val);
1589 src->def = def;
1638 struct ir3_register *src = phi->srcs[i];
1639 if (!src->def)
1643 _mesa_hash_table_search(state->remap, src->def);
1646 set_src_val(src, new_val);
1869 foreach_src (src, phi) {
1871 if (src->def == phi->dsts[0])
1874 if (!src->def || (def && def != src->def))
1876 def = src->def;
1906 foreach_src (src, instr) {
1907 if (src->def)
1908 src->def = simplify_phi_def(src->def);
2047 ra_foreach_src (src, instr) {
2048 if (!(src->flags & IR3_REG_KILL) &&
2049 src->def->interval_start < dst->interval_end &&
2050 dst->interval_start < src->def->interval_end) {
2051 ir3_force_merge(dst, src->def,
2052 src->def->interval_start - dst->interval_start);