Lines Matching refs:pred
100 struct ir3_instruction *pred; /* current p0.x user, if any */
281 assert(ctx->pred == NULL);
282 ctx->pred = instr;
435 * NOTE if any instructions use pred register and have other
488 if (writes_pred(instr) && ctx->pred) {
489 assert(ctx->pred != instr);
969 assert(ctx->pred);
971 ir = ctx->pred->block->shader;
983 /* remap remaining instructions using current pred
984 * to new pred:
986 * TODO is there ever a case when pred isn't first
989 if (ssa(predicated->srcs[0]) == ctx->pred) {
991 new_pred = split_instr(ctx, ctx->pred);
992 /* original pred is scheduled, but new one isn't: */
996 /* don't need to remove old dag edge since old pred is
1004 if (ctx->block->condition == ctx->pred) {
1006 new_pred = split_instr(ctx, ctx->pred);
1007 /* original pred is scheduled, but new one isn't: */
1014 /* all remaining predicated remapped to new pred: */
1015 ctx->pred = NULL;
1182 /* addr/pred writes are per-block: */
1185 ctx->pred = NULL;