Lines Matching refs:instr
45 #define di(instr, fmt, ...) \
50 ir3_print_instr_stream(stream, instr); \
97 struct ir3_instruction *scheduled; /* last scheduled instr */
125 struct ir3_instruction *instr;
176 struct ir3_instruction *instr);
177 static void sched_node_add_dep(struct ir3_instruction *instr,
181 is_scheduled(struct ir3_instruction *instr)
183 return !!(instr->flags & IR3_INSTR_MARK);
188 sched_check_src_cond(struct ir3_instruction *instr,
193 foreach_ssa_src (src, instr) {
212 is_outstanding_sy(struct ir3_instruction *instr, struct ir3_sched_ctx *ctx)
214 if (!is_sy_producer(instr))
220 if (instr->block != ctx->block)
223 struct ir3_sched_node *n = instr->data;
228 is_outstanding_ss(struct ir3_instruction *instr, struct ir3_sched_ctx *ctx)
230 if (!is_ss_producer(instr))
236 if (instr->block != ctx->block)
239 struct ir3_sched_node *n = instr->data;
244 cycle_count(struct ir3_instruction *instr)
246 if (instr->opc == OPC_META_COLLECT) {
249 foreach_src (src, instr) {
254 } else if (is_meta(instr)) {
262 schedule(struct ir3_sched_ctx *ctx, struct ir3_instruction *instr)
264 assert(ctx->block == instr->block);
268 list_delinit(&instr->node);
270 if (writes_addr0(instr)) {
272 ctx->addr0 = instr;
275 if (writes_addr1(instr)) {
277 ctx->addr1 = instr;
280 if (writes_pred(instr)) {
282 ctx->pred = instr;
285 instr->flags |= IR3_INSTR_MARK;
287 di(instr, "schedule");
289 list_addtail(&instr->node, &instr->block->instr_list);
290 ctx->scheduled = instr;
292 if (is_kill_or_demote(instr)) {
297 struct ir3_sched_node *n = instr->data;
304 if (src->block != instr->block)
311 bool counts_for_delay = is_alu(instr) || is_flow(instr);
314 unsigned delay_cycles = counts_for_delay ? 1 + instr->repeat : 0;
330 unsigned cycles = cycle_count(instr);
332 if (is_ss_producer(instr)) {
333 ctx->ss_delay = soft_ss_delay(instr);
335 } else if (!is_meta(instr) &&
336 sched_check_src_cond(instr, is_outstanding_ss, ctx)) {
343 if (is_sy_producer(instr)) {
349 ctx->sy_delay = soft_sy_delay(instr, ctx->block->shader);
353 } else if (!is_meta(instr) &&
354 sched_check_src_cond(instr, is_outstanding_sy, ctx)) {
375 should_skip(struct ir3_sched_ctx *ctx, struct ir3_instruction *instr)
377 if (ctx->remaining_kills && (is_tex(instr) || is_mem(instr))) {
380 * definition, if there are remaining kills, and this instr
384 struct ir3_sched_node *n = instr->data;
395 struct ir3_instruction *instr, struct ir3_instruction *src)
397 foreach_ssa_src (other_src, instr) {
406 if (instr->block != src->block)
409 return !should_skip(ctx, instr);
417 struct ir3_instruction *instr)
419 assert(!is_scheduled(instr));
421 if (instr == ctx->split) {
428 if (should_skip(ctx, instr))
438 if (writes_addr0(instr)) {
439 struct ir3 *ir = instr->block->shader;
445 if (indirect->address->def != instr->dsts[0])
447 ready = could_sched(ctx, indirect, instr);
455 if (writes_addr1(instr)) {
456 struct ir3 *ir = instr->block->shader;
462 if (indirect->address->def != instr->dsts[0])
464 ready = could_sched(ctx, indirect, instr);
476 if (writes_addr0(instr) && ctx->addr0) {
477 assert(ctx->addr0 != instr);
482 if (writes_addr1(instr) && ctx->addr1) {
483 assert(ctx->addr1 != instr);
488 if (writes_pred(instr) && ctx->pred) {
489 assert(ctx->pred != instr);
500 * fixed length instr->srcs[].
504 if (is_kill_or_demote(instr)) {
505 struct ir3 *ir = instr->block->shader;
521 /* Find the instr->ip of the closest use of an instruction, in
533 nearest_use(struct ir3_instruction *instr)
536 foreach_ssa_use (use, instr)
545 if (is_input(instr))
552 is_only_nonscheduled_use(struct ir3_instruction *instr,
555 foreach_ssa_use (other_use, instr) {
564 new_regs(struct ir3_instruction *instr)
568 foreach_dst (dst, instr) {
579 live_effect(struct ir3_instruction *instr)
581 struct ir3_sched_node *n = instr->data;
583 (n->partially_live || !instr->uses || instr->uses->entries == 0)
585 : new_regs(instr);
594 foreach_ssa_src_n (src, n, instr) {
595 if (__is_false_dep(instr, n))
598 if (instr->block != src->block)
601 if (is_only_nonscheduled_use(src, instr))
615 should_defer(struct ir3_sched_ctx *ctx, struct ir3_instruction *instr)
618 if (sched_check_src_cond(instr, is_outstanding_ss, ctx))
628 if (sched_check_src_cond(instr, is_outstanding_sy, ctx))
638 if (ctx->sy_index - ctx->first_outstanding_sy_index >= 8 && is_sy_producer(instr))
641 if (ctx->ss_index - ctx->first_outstanding_ss_index >= 8 && is_ss_producer(instr))
697 if (defer && should_defer(ctx, n->instr))
702 int live = live_effect(n->instr);
706 if (!check_instr(ctx, notes, n->instr))
720 * may open up new opportunities, as otherwise a single-operand instr
743 di(chosen->instr, "dec%s: chose (%s)", mode, dec_rank_name(chosen_rank));
792 if (defer && should_defer(ctx, n->instr))
795 if (!check_instr(ctx, notes, n->instr))
806 unsigned distance = nearest_use(n->instr);
817 di(chosen->instr, "inc%s: chose (%s)", mode, inc_rank_name(chosen_rank));
842 if (!is_meta(n->instr) || n->instr->opc == OPC_META_COLLECT)
850 di(chosen->instr, "prio: chose (meta)");
864 di(n->instr, "maxdel=%3d le=%d del=%u ", n->max_delay,
865 live_effect(n->instr), node_delay(ctx, n));
870 di(child->instr, " -> (%d parents) ", child->dag.parent_count);
885 return chosen->instr;
889 return chosen->instr;
893 return chosen->instr;
897 return chosen->instr;
995 predicated->srcs[0]->def->instr = new_pred;
1021 sched_node_init(struct ir3_sched_ctx *ctx, struct ir3_instruction *instr)
1027 n->instr = instr;
1028 instr->data = n;
1032 sched_node_add_dep(struct ir3_instruction *instr, struct ir3_instruction *src,
1036 if (src->block != instr->block)
1041 assert(__is_false_dep(instr, i));
1045 struct ir3_sched_node *n = instr->data;
1052 if (instr->opc == OPC_META_COLLECT)
1053 sn->collect = instr;
1055 unsigned d_soft = ir3_delayslots(src, instr, i, true);
1056 unsigned d = ir3_delayslots(src, instr, i, false);
1069 mark_kill_path(struct ir3_instruction *instr)
1071 struct ir3_sched_node *n = instr->data;
1079 foreach_ssa_src (src, instr) {
1080 if (src->block != instr->block)
1088 is_output_collect(struct ir3_instruction *instr)
1090 if (instr->opc != OPC_META_COLLECT)
1093 foreach_ssa_use (use, instr) {
1103 is_output_only(struct ir3_instruction *instr)
1105 foreach_ssa_use (use, instr)
1113 sched_node_add_deps(struct ir3_instruction *instr)
1119 if (instr->opc == OPC_META_PHI)
1125 foreach_ssa_src_n (src, i, instr) {
1126 sched_node_add_dep(instr, src, i);
1132 if (is_kill_or_demote(instr) || is_input(instr)) {
1133 mark_kill_path(instr);
1136 if (is_output_only(instr)) {
1137 struct ir3_sched_node *n = instr->data;
1161 foreach_instr (instr, &ctx->unscheduled_list)
1162 sched_node_init(ctx, instr);
1164 foreach_instr (instr, &ctx->unscheduled_list)
1165 sched_node_add_deps(instr);
1202 foreach_instr_safe (instr, &ctx->unscheduled_list) {
1203 if (is_kill_or_demote(instr))
1205 if (is_sy_producer(instr))
1220 foreach_instr_safe (instr, &ctx->unscheduled_list)
1221 if (instr->opc == OPC_META_INPUT || instr->opc == OPC_META_PHI)
1222 schedule(ctx, instr);
1224 foreach_instr_safe (instr, &ctx->unscheduled_list)
1225 if (instr->opc == OPC_META_TEX_PREFETCH)
1226 schedule(ctx, instr);
1230 struct ir3_instruction *instr;
1232 instr = choose_instr(ctx, ¬es);
1233 if (instr) {
1234 unsigned delay = node_delay(ctx, instr->data);
1239 schedule(ctx, instr);
1264 foreach_instr (instr, &ctx->unscheduled_list)
1265 di(instr, "unscheduled: ");
1292 foreach_instr (instr, &block->instr_list) {
1293 instr->data = NULL;
1313 get_array_id(struct ir3_instruction *instr)
1319 foreach_dst (dst, instr)
1322 foreach_src (src, instr)
1329 /* does instruction 'prior' need to be scheduled before 'instr'? */
1331 depends_on(struct ir3_instruction *instr, struct ir3_instruction *prior)
1338 if (((instr->barrier_class & IR3_BARRIER_EVERYTHING) &&
1341 instr->barrier_class))
1344 if (instr->barrier_class & prior->barrier_conflict) {
1345 if (!(instr->barrier_class &
1351 if (get_array_id(instr) != get_array_id(prior)) {
1363 add_barrier_deps(struct ir3_block *block, struct ir3_instruction *instr)
1365 struct list_head *prev = instr->node.prev;
1366 struct list_head *next = instr->node.next;
1380 if (instr->barrier_class == pi->barrier_class) {
1381 ir3_instr_add_dep(instr, pi);
1385 if (depends_on(instr, pi))
1386 ir3_instr_add_dep(instr, pi);
1401 if (instr->barrier_class == ni->barrier_class) {
1402 ir3_instr_add_dep(ni, instr);
1406 if (depends_on(ni, instr))
1407 ir3_instr_add_dep(ni, instr);
1426 foreach_instr (instr, &block->instr_list) {
1427 if (instr->barrier_class) {
1428 add_barrier_deps(block, instr);