Lines Matching defs:assigner
46 ir3_delayslots(struct ir3_instruction *assigner,
60 if (is_meta(assigner) || is_meta(consumer))
63 if (writes_addr0(assigner) || writes_addr1(assigner))
66 if (soft && is_ss_producer(assigner))
67 return soft_ss_delay(assigner);
70 if (is_ss_producer(assigner) || is_sy_producer(assigner))
77 /* assigner must be alu: */
86 bool mismatched_half = (assigner->dsts[0]->flags & IR3_REG_HALF) !=
130 ir3_delayslots_with_repeat(struct ir3_instruction *assigner,
134 unsigned delay = ir3_delayslots(assigner, consumer, consumer_n, false);
137 struct ir3_register *dst = assigner->dsts[assigner_n];
139 if (assigner->repeat == 0 && consumer->repeat == 0)
155 if (assigner->opc == OPC_MOVMSK)
176 * sub-instruction within assigner/consumer it corresponds to. For (r)
188 if (assigner->opc == OPC_SWZ || assigner->opc == OPC_SCT)
193 /* The delay we return is relative to the *end* of assigner and the
209 unsigned offset = first_src_instr + (assigner->repeat - first_dst_instr);
214 delay_calc_srcn(struct ir3_instruction *assigner,
219 struct ir3_register *dst = assigner->dsts[assigner_n];
238 return ir3_delayslots_with_repeat(assigner, consumer, assigner_n, consumer_n);
255 list_for_each_entry_from_rev (struct ir3_instruction, assigner, start_list,
257 if (count_instruction(assigner))
258 distance += assigner->nop;
263 if (is_meta(assigner))
268 foreach_dst_n (dst, dst_n, assigner) {
278 assigner, consumer, dst_n, src_n, mergedregs);
287 if (count_instruction(assigner))
288 distance += 1 + assigner->repeat;