Lines Matching refs:reg
161 struct ir3_register *reg, unsigned new_flags)
172 reg = ir3_reg_clone(ctx->shader, reg);
180 reg->uim_val = fui(_mesa_half_to_float(reg->uim_val));
186 reg->iim_val = abs(reg->iim_val);
191 reg->fim_val = fabs(reg->fim_val);
196 reg->iim_val = -reg->iim_val;
201 reg->fim_val = -reg->fim_val;
224 if (const_state->immediates[i] == reg->uim_val)
236 const_state->immediates[i] = reg->uim_val;
240 reg->flags = new_flags;
241 reg->num = i + (4 * const_state->offsets.immediate);
243 instr->srcs[n] = reg;
325 * make the shared reg's live range extend outside of its loop. Users
347 struct ir3_register *reg, unsigned n)
349 struct ir3_instruction *src = ssa(reg);
354 unsigned new_flags = reg->flags;
363 assert(!(reg->flags & IR3_REG_ARRAY));
364 reg->array = src_reg->array;
366 reg->flags = new_flags;
367 reg->def = src_reg->def;
373 reg->def->instr->use_count++;
382 unsigned new_flags = reg->flags;
424 conflicts(instr->address, reg->def->instr->address))
470 ir3_instr_set_address(instr, reg->def->instr->address->def->instr);
530 struct ir3_register *reg = instr->srcs[0];
531 if (!(reg->flags & IR3_REG_ARRAY)) {
532 struct ir3_instruction *src_instr = ssa(reg);
558 foreach_src_n (reg, n, instr) {
559 struct ir3_instruction *src = ssa(reg);
569 if ((reg->flags & IR3_REG_ARRAY) && src->opc != OPC_META_PHI)
581 progress |= reg_cp(ctx, instr, reg, n);
588 * narrow the descriptor (which may be a constant) to a half-reg in ir3.